AMD Fusion Details Leaked 94
negRo_slim writes "AMD has pushed Fusion as one of the main reasons to justify its acquisition of ATI. Since then, AMD's finances have changed colors and are now deep in the red, the top management has changed, and Fusion still isn't anything AMD wants to discuss in detail. But there are always 'industry sources' and these sources have told us that Fusion is likely to be introduced as a half-node chip."
print page (Score:2, Informative)
Re:Just one question... (Score:5, Informative)
In related news ... (Score:1, Informative)
In related news, there are rumours, just recently denied [dailytech.com], that Nvidia is exiting the chipset business.
Re:Just one question... (Score:4, Informative)
FTFA: "As Fusion is shaping up right, we should expect the chip be become the first half-node CPU (between 45 and 32 nm)"
Cost and Performance info? (Score:5, Informative)
Without cost and performance (speed) info, this is not really interesting.
Facts in the story:
- AMD using TSMC
- AMD using 40nm instead of 45 or 32
- DirectX 10.1 support with the R800 engine on the chip.
None of this matters unless it does something better and/or cheaper than some other option.
Re:Cost and Performance info? (Score:5, Informative)
No, the article says a Bulldozer-based Fusion chip will be fabbed by TSMC. AMD will probably make the non-fused Bulldozer itself.
Re:Half-Node? (Score:4, Informative)
WARNING LAST MEASURE (Score:3, Informative)
Re:print page (Score:2, Informative)
The verbage "less ads" is wrong, period.
bitch.
But hey, I'm responding to a troll. I was simply trying to be a little snarky while pointing out that the OP sounded like an ignoramus writing as he did. I'm not saying he is, but if Albert Einstein ever said "Y'alls better believe that thar sound speed is fewer than light speed", you'd think he's an idiot as well. Fewer is never a replacement for less, and vice versa.
That's a weird definition of node... (Score:5, Informative)
I can't comment if your description of a "node" is true for AMD or not, but the rest of the silicon industry (via the ITRS roadmap) labels technology nodes like 90nm, 65nm, 45nm, 32nm, 32nm, 16nm, etc, etc...
Historically, the ITRS used the term "technology node" to attempt to provide a single, simple indicator of overall industry progress in IC technology by defining it to be the smallest half-pitch of contacted metal lines on any product (usually DRAM), but they have since abandoned this practice of declaring technology nodes (because various parameters are now scaling at widely different rates). Nowdays, in the rest of the semiconductor industry a node often corresponds to some major process enabling technology (e.g., TSMC 45nm combined 193nm immersion photolithography, strained silicon and extreme low-k inter-metal dielectric material).
If you meant that AMD has 7-9 different nodes that evolved from the 45nm node, I guess that's consistant with this too, but not that consistant with everyone elses' use of "node", they would probably call that a "half-node". If you meant that AMD's 45nm technology uses up to 7 to 9 different scaling factors from other technology nodes I guess that is consistant with this too, but I don't think that's standard industry usage of the word "node".
AFAIK, the industry uses the term "half-node" when the somewhere between the main nodes (e.g., at TSMC, 40nm is considered a half-node from 45nm). Normally a half-node is created by some sort of parametric scaling of some of the features of a regular process node to achieve higher transistor density (generally something theoretically in-reach of a regular process node, by tweaking scaling by different amounts). Of course there are usually several different variety of 1/2 nodes (low leakage, high speed variants, etc) developed. But that's no different than the fact there are many different variants at a particular node in any case.
Often process technology folks design something like a 45nm technology node and after they are comfortable with being able to yield it, they spend some time to tweak it to see if they can get a shrink and if the tweakage good enough, they market it as another "half-node" design point. This is a pretty good tradeoff since they can offer a "shrink" to customer using the main node as a cost reduction exercise or a way to scale customized parts of their designs (e.g., cells, rams, I/O pads) w/o radical redesigns (which might happen between major technology shifts) giving a good !/$ for their engineering efforts.
The reason why many folks think it's weird to design something that probably has a lot of custom stuff like a CPU-GPU hybrid in a half-node is that new things take a long time to design and with processes technology a moving target, it's nice to be able to schedule in a "shrink" and get a low effort cost reduction during the useful sellable lifetime for a product. By starting production in a half-node, to get a cost reduction worth the engineering effort, you'll probably have to redesign/layout the chip in the next technology node (say 32nm which may have lots of different non-compatible features and take lots of effort like a new high-k gate dielectric).