Details of New Intel Dunnington and Nehalem Architectures Leaked

Daily Tech is reporting that details about Intel's new processor models were leaked over the weekend. Both the six core Dunnington and Nehalem architectures were featured in this leak. "Dunnington includes 16MB of L3 cache shared by all six processors. Each pair of cores can also access 3MB of local L2 cache. The end result is a design very similar to the AMD Barcelona quad-core processor; however, each Barcelona core contains 512KB L2 cache, whereas Dunnington cores share L2 cache in pairs. [...] Nehalem is everything Penryn is -- 45nm, SSE4, quad-core -- and then some. For starters, Intel will abandon the front-side bus model in favor of QuickPath Interconnect; a serial bus similar to HyperTransport."

QuickPath vs HyperTransport

[Dice]

The Wikipedia page on QuickPath [wikipedia.org] is very lacking in the realm of details. Does anyone know how it stacks up against HyperTransport [wikipedia.org]? One of the most mouth-watering proposed uses for HT3 that I've heard of was the possibility for an external HT3 bus on a machine which could be used to link together multiple physical machines into one giant NUMA beast.

Imagine a Beowulf of those ;)

Re:Wow

[suso]

Am I the only one who thinks that having 3 cores, 6 cores, 3MB and 12MB is weird? Where did all the multiples of three come from in the sea of powers or 2. Did we suddenly switch to trinary or something?

FSB

[Anonymous Coward]

"Intel will abandon the front-side bus..."

I think I speak for us all when I say ABOUT FSCKING TIME!

Re:Intel still playing the Chuck Norris of vendors

[nonsequitor]

QuickPath: because Intel doesn't adopt standards... it rewrites them.

Why should Intel pay AMD to license HyperTransport? The specs may be open to developers, but that does not mean they are unencumbered by patents. Even if they could, why Would they?

I don't really know the situation surrounding the technology, but even if Intel could use it for free, they would lose a huge battle in the PR War. I can see it now, "Remember that interconnect AMD has been using for years now? Well our design has finally caught up with theirs enough to use it." Remember that to the masses, the non-slashdot crowd, they have no idea what the techno-jargon spouted by Intel marketing means.

Intel currently has the superior technology, this is because of superior fabrication capabilities, not because of a superior architecture, if I've been following this correctly over the last few years. The general public is oblivious to the fact that internally the AMD architecture is cleaner and more elegant, the only thing they have to go on is marketing. If Intel were to adopt HyperTransport, which IIRC is trademarked by AMD, that would be a huge step backwards for Intel marketing, which is just recovering now that the Core 2 architecture has put them back on top.

Re:Wow

[milsoRgen]

They could have gone to 3 cores, like the competition.

Which is a fantastic move, as they are simply 4-core chips with a core disabled due to manufacturing defects and what have you.

Re:FSB

[networkBoy]

Very true!
Now, hopefully Intel will open the new bus to third party apps (like that FPGA opteron drop-in). I'll admit I'm an Intel fanboy, but I'd buy an opteron system in a heartbeat if I could pony up the $5K for that co-processor...

What surprises me is the current lack of complaints that you can't drop these new processors into an old board, as a new socket will be required (this is because the northbridge is rolling into the CPU IIRC). I don't see it as a big deal, because usually when upgrading the CPU one also is upgrading the memory and MB as well.
-nB

Re:Wow

[thsths]

Am I the only one who thinks that having 3 cores, 6 cores, 3MB and 12MB is weird? Where did all the multiples of three come from in the sea of powers or 2.

Concerning the six cores: yes, that is weird. And after making fun of AMD for selling 3 core CPUs, it is now our obligation to make fun of Intel for announcing six core CPUs. Especially since they seem to tick pretty much the same boxes as AMD anyway. (Unfortunately 6 is more than 3, so I would still want an Intel...)

For the cache, the matter is simple. If you can fit 12 MB, but not 16, then 12 is still better than 8. You build them in 3 units of 4 MB each, so no big deal.

Re:Welll....

[Firehed]

I seem to remember Intel made some proof-of-concept 80-core chip a while ago. Close enough.

Re:Dunnington and Nehalem?

[milsoRgen]

You mean this little piece of chippery? [xbitlabs.com]

But there was also, The Tualatin [wikipedia.org], the last of the P3's. [wikipedia.org] .

True, but...

[Junta]

Intel did have a hell of a time confusing people before the concrete samples were available as to whether it was the same thing as AMD's 64-bit. They avoided using any term AMD associated with it for a time, instead tossing around ia32e and em64t and bs like that. I know some projects even baked into plans how to cope with yet another processor architecture for lack of a commitment from Intel that their 64-bit x86 compatible stuff would be the same.

Intel's hand was effectively forced because they learned their lesson from Itanium, don't screw with an incumbent variation of your flagship instruction set. With AMD's lead they would've risked yet another Itanium fiasco, so they picked the safe path and tried to PR dance around the existence of AMD's 64-bit stuff.

Itanium was an odd path in the history of Intel proving they truly thought they alone dictated the course of x86 technology. It stands in stark contrast to the history of supporting legacy all the way back to the 8086 days.

In this case, it's not the end-user or software developers being impacted, just hardware implementors who already have to do whatever the processor architecture dictates. Despite that freedom, Intel's unable to offer something that isn't obviously similar to the competing offering since it just is such a damn good idea. AMD has led some revolutionary changes in x86 architecture, while Intel has been able to follow up with evolutionary advances, fabrication, and marketing to continue eating the more significant profit margin space.

Re:QuickPath vs HyperTransport

[Beliskner]

the possibility for an external HT3 bus on a machine which could be used to link together multiple physical machines into one giant NUMA beast

That's what the Cray XT5 [cray.com] does - uses Hypertransport on new AMD Quad Core Barcelona to link multiple CPUs via their Seastar chip, and with FPGA accelerators too, sheesh