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Samsung to Produce Faster Graphics Memory 138

Samsung has announced a new line of GDDR5 chips that will supposedly be able to deliver data at speeds of up to 6 Gbps. In addition to faster data delivery the new chips also claim to consume less energy than previous versions. "Samsung said the new chips consume 1.5 volts, making them about 20 percent more efficient than GDDR 3 chips. Samples of the GDDR 5 chips began shipping to graphics-processor makers last month, and Samsung plans to begin mass production of the chips during the first half of next year. GDDR 5 memory should first appear in high-end gaming systems where users are willing to pay a premium for better graphics. Samsung did not disclose pricing for the chips.
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Samsung to Produce Faster Graphics Memory

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  • Qimonda (Score:5, Informative)

    by imstanny ( 722685 ) on Monday December 03, 2007 @03:19PM (#21562937)
    Qimonda already released GDDR5 Article from November 2: http://www.pclaunches.com/other_stuff/qimonda_gddr5_memory_now_available.php [pclaunches.com]
  • Inaccurate summary (Score:4, Informative)

    by Khyber ( 864651 ) <techkitsune@gmail.com> on Monday December 03, 2007 @03:21PM (#21562975) Homepage Journal
    it should be noted that it's 6Gbit per pin, not per chip.
  • by randyest ( 589159 ) on Monday December 03, 2007 @03:35PM (#21563129) Homepage
    Samsung said the new chips consume 1.5 volts, making them about 20 percent more efficient than GDDR 3 chips.

    What poor science reporting. Nothing "consumes volts." Volts measure voltage -- difference in potential. Devices consume Joules -- units of energy. Also acceptable would be Watts -- energy per unit time. It would have been really nice to be given the Watts per Bandwidth per Size (W/Gbps/bits), but I realize that's asking way too much of the Times.
  • by Intron ( 870560 ) on Monday December 03, 2007 @03:47PM (#21563289)
    That would be implied by the aggregate 24G bytes/sec later in the article. So I guess they are still keeping the 32 I/O pins that the previous generation used and not quite doubling the speed. The article is also missing the size, which is a spec that hardware designers frequently wish to see, but I think it's probably still 512 Mbit or we would have heard about it.
  • by randyest ( 589159 ) on Monday December 03, 2007 @03:47PM (#21563291) Homepage
    No, volts are not a good metric of efficiency. Voltage and current would be, but that's because Volts * Amps = Watts. If you need a real example to understand why, consider a 1.5V chip that draws 3 Amps and a 5V chip that draws 100mA, then tell me which is more "efficient" and how you'd know that from the voltages alone.
  • by randyest ( 589159 ) on Monday December 03, 2007 @04:07PM (#21563571) Homepage
    You mean across different devices? As much as current and power consumption do, which is to say, a lot. Many orders of magnitude. That's kind of a strange question that belies a weak understanding of electronics. We don't really speak of the "resistance" of a chip, because that's pretty much meaningless. You could calculate an "effective resistance" by R = V / I, but it's not very meaningful or useful to do so.
  • by Jake73 ( 306340 ) on Monday December 03, 2007 @04:18PM (#21563693) Homepage
    Because they don't all work for the Onion.

    http://www.theonion.com/content/node/33930 [theonion.com]
  • by shadow_slicer ( 607649 ) on Monday December 03, 2007 @04:22PM (#21563735)
    The difference is we are talking about semiconductor devices. Losses from these semiconductor devices are primarily due to leakage and switching. As long as we're still using silicon, leakage will be roughly 0.5 V^2/R, no matter how much current you pump through the transistors. Switching losses occur in when logic changes from 1's to 0's due to the capacitance of the transistors. The power lost here is roughly 0.5 f C V^2, where f is the switching frequency and C is the capacitance (material dependent). The V^2's means that reducing the voltage has a significant impact on losses. If we note that R and C are completely determined by the material (silicon) and the fabrication process, we can see that as long as the frequency is held constant, the voltage is a reasonable metric for comparing power consumption in silicon devices.

    Of course this analysis is purely approximate since there are a lot of there things going in the devices. And I'm assuming complete capacitive discharge (independent of switching frequency), and didn't consider the changes in refresh rate to this DRAM device. But suffice it to say voltage is still a pretty good metric for comparison (until you actually build the thing and test it).
  • by randyest ( 589159 ) on Monday December 03, 2007 @04:51PM (#21564043) Homepage
    Did you just make that up? Lower voltage does not equal (or even imply) lower resistance in "chip terms" or any other. Voltage has no impact on resistance. And it's not very common to hear anyone (with a clue) speak of "chip resistance" since it's a rather meaningless concept that provides the same info as voltage and current in a more roundabout way for no good reason.

    Really, your statement is worse than not inaccurate, it's the opposite of accurate. Devices that use lower voltage tend to have higher currents (for the same function/efficiency.) Although the overall power tends to be lower, it's not as much lower as it would be if V were reduced and current were unchanged. Were this not true, you'd see power consumption for a line of devices fall with the square of their voltages. Of course this is not the case, since 1.5V devices don't tend to consume less than 1% of similar-function 5V devices. (Part of the reason is that lower voltage requires thinner gate dielectrics, which increases leakage current, and the smaller features of lower-voltage devices include thinner wires, with more resistance, which require more current for the same performance.)

    That did drive me nuts, of course, because it was so wrong. Yet, the use of g/mil^2 to measure mass per area (grams per (0.001 x 0.001) inches.) doesn't bother me at all.

    In short, everything you said is wrong.
  • by epine ( 68316 ) on Monday December 03, 2007 @05:06PM (#21564209)
    This has been understood in the industry for decades: in a given silicon process, power consumption fits roughly within the envelop V^2 * F, where F represents frequency. Given a process shrink, this relation might or might not hold true. For a long time it was a good rule of thumb, but then in the era of excessively high leakage current it did not hold true, more recently with better control over leakage, the relationship is again a good rule of thumb. The upshot is that, over two decades, almost every reduction in voltage for a given class of part corresponds to a significant increase in power efficiency.

    What the article failed to explain is this long history of voltage serving as a proxy for power efficiency.

    The other relationship is that a given part will usually demonstrate a relationship where lower frequencies are stable at lower voltages. If increasing the voltage by 20% allows you to overclock a processor from 2GHz to 3GHz, you can estimate your increased power draw as 1.2^2 * 1.5, about double where you started.

    It's almost pointless to convert this measure into watts, as so many other variables change in tandem. The new part has different bandwidth, different latency, different leakage, different dynamic consumption. There's no simple number that gets you apples vs apples. Most of the time, however, voltage is fair proxy. Peak consumption figures are mostly worthless from an efficiency perspective, except for sizing your power and cooling requirements.

    On a side note, I'm wondering when we hit the floor on practical CMOS voltage levels. Surely the band-gap will come into play in the near future, and then what? Does the efficiency graph suddenly develop a crimp and stagger forward on a much reduced slope? This happened with hard drives, where there was a period of accelerated capacity increase (PRML/GMR/pixie-dust era) only to return to the more sedate curve once again later on. It wasn't long ago that F hit thin air (due to thermal issues) and now F is increasing at half the rate it sustained for a least a decade prior.

    Long ago apparently respectable sources used to proclaim "silicon will hit the brick wall at 0.1um". In turns out S-curves hardly ever play out that way. The curve begins to taper downward when the easy gains are exhausted. The phrase "peak oil" is another one of those conceptual nightmares, much like the chimeric brick-wall on photo lithography. It's not going to be a peak, is it? It's going to be a wavy plateau. On any particular graph, you can point to a "peak" (though none of the graphs will agree), it's just that there won't be a momentous Alderan-disturbance that ripples though planet earth as the precocious metaphor suggests. Much like the silicon people had to finally confess, driving F higher and higher as your primary performance metric (at the cost of absolute efficiency) makes about as much sense in the long run as a single-occupancy air-conditioned Hummer in rush hour traffic.

    Speaking of which, engine displacement is roughly as fair as a measure in the automotive sector as voltage in silicon. It's the nature of the internal combustion engine that these engines are far from their peak efficiency at low to medium throttle, which is why having a lot of power you rarely use is no free lunch. If you accept that a typical 2 liter engine is more efficient than a typical 3 liter engine, why would voltage as a proxy for power be any different?
  • by iONiUM ( 530420 ) * on Monday December 03, 2007 @05:16PM (#21564333) Journal
    Don't buy HD porn. Ever.
  • by empaler ( 130732 ) on Monday December 03, 2007 @05:27PM (#21564487) Journal
    It's an old Onion article rewrite... I'd completely forgotten about it, so it was good to see again... :)
    Article [theonion.com]. He missed a few words, but it was good.
  • Comment removed (Score:2, Informative)

    by account_deleted ( 4530225 ) on Tuesday December 04, 2007 @01:34AM (#21568501)
    Comment removed based on user account deletion

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