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AMD Hardware

AMD's Barcelona to Outpace Intel by 50% 199

Gr8Apes writes "AMD is upping the performance numbers for Barcelona by stating that "Barcelona will have a 50% advantage over Clovertown in floating point applications and 20% in integer performance 'over the competition's highest-performing quad-core processor at the same frequency'". AMD also claims that the new 3.0 GHz Opterons beat comparable Intel Xeon 5100 series processors in three server-specific benchmarks (SPECint_rate_2006, SPECint_rate2006, SPECompM2001) by up to 24%."
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AMD's Barcelona to Outpace Intel by 50%

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  • by grasshoppa ( 657393 ) on Monday April 23, 2007 @11:57AM (#18841279) Homepage
    "Up to" means nothing to me, except as an advertisement for the competator; whichever has the least unpleasant average and worst case performance is the one I'm interested in.

    And those numbers would be indicative of anything either. The problem with CPU benchmarks is that they have no real world application; Everyone has different needs. However, the marketing types for both the suppliers and consumers need numbers to push in front of each other, so they make up these things which those of us in the field understand have no real world meaning.

    It's a vicious circle, non?
  • by ushering05401 ( 1086795 ) on Monday April 23, 2007 @12:02PM (#18841361) Journal
    Over the past week we have heard about Intel's dominance and flashy new products, AMD's disastrous quarter, and now AMD's supposedly dominant new offering.

    I read tech news daily and am getting sick of the media wars... It is no wonder casual users get fatigued trying to keep up. Casual opinions depend on which day (or week or month) a person chooses to research product offerings. It is no wonder I am always hitting a brick wall when trying to get my users to educate themselves so they can get more out of their tech. They don't know what to make of all the posturing.

    This is not a function of the tech world developing *that* quickly. It is a result of the major players trying to out-strategize each other. I don't want to see anymore benchmarks (or hear about anymore promised software) until I am standing in front of a demo machine that is running the tech.

    Guess I woke up on the wrong side of the bed.

    Regards.
  • Heh. (Score:5, Interesting)

    by Skadet ( 528657 ) on Monday April 23, 2007 @12:23PM (#18841627) Homepage
    Indeed. I work in a law office as a graphic designer/web designer/video editor. That's what I do all day (when I'm not reading slashdot).

    2 of our attorneys just got quad-core Mac Pros with Studio displays. For writing documents on. Maybe the occasional slide show. I'm stuck on this 3-year-old Dell with dual CRT monitors. Old ones.

    Sorry, just had to bitch a little. Your comment is more real-world than you may have realized.
  • This post is very confused.

    First of all you can't put two dies on the same cpu, or at least it would be a horribly bad idea. You can put 2 cpu's on a die. Now I thought AMD already did this but they could just package several chips together and I'm feeling too lazy to look it up.

    Anyway, yes for Intel chips they must communicate over the FSB. However, as I've recently been finding out they don't do that much communicating. For instance most cache state info is generated just by listening on the FSB. Though sometimes one CPU needs to invalidate a read.

    However, not having an FSB AMD's chips don't have a set total system bandwidth they 'use up.' Each chip has it's own memory controller and HT lanes. Perhaps putting the chips in the same package will allow AMD to speed up hypertransport or indirect memory lookup but since AMD doesn't use just an FSB it seems they actually have less to gain than intel by putting many cpus on one chip.
  • by logicnazi ( 169418 ) <gerdes&invariant,org> on Monday April 23, 2007 @02:30PM (#18843345) Homepage
    Well, I highly doubt that AMD's integrated memory controller's ability to hide the latency can scale any faster than Intel's cache tech. After all they basically control latency in the same manner, smartly guessing what memory the chip is going to need and making sure they keep the cache filled with that data. Of course the on board memory controller means that the latency starts at a lower place in the first place. Though it could be that the extra latency of going across the northbridge gets worse as clock speeds increase but I kinda expect it will remain proportional to bus speed.

    The real issue in the next generation is simply the raw bandwidth. If AMD keeps moving in the direction it has it's next systems will be NUMA architectures like the Quad FX. This means that each chip (maybe next gen it will be core) has a constant memory bandwidth while Intel has to divide one FSB by the total number of chips in the system. Also AMD no doubt will have copied some of Intel's smart cache techniques.

    Still if Intel can just keep parity (and they have the advantage of just now moving to 45nm) for another year or so (and not fuck up CSI again) that's pretty much good enough. At that point Intel no loner suffers a fundamental architectural deficit compared to AMD and their superior process technology gives them a serious advantage.

    The three two questions are these:

    1) How much market share can AMD gain capitalizing on Intel's memory starvation in the next year or two? Mostly this is going to depend on how well AMD can copy Intel's fancy cache and memory conflict checking hardware. If they can do a fair job of this then their underlying architectural advantages should let them overcome Intel's process advantages and make a fair bit of headway.

    Unfortunately for AMD they could end up not being able to take full advantage of their superior (large scale) architecture if OS vendors don't provide better NUMA support. Eventually this is the way both AMD and Intel are going but better support now would be a huge boon for AMD.

    2) Can AMD pull another rabbit out of it's hat that will give it a fundamental *architectural* advantage before Intel comes out with an acceptable version of CSI? Simply upping the GHz on HyperTransport isn't enough. AMD and Intel face the same fundamental obstacles to making high speed serial links and this area just isn't complex enough to let them totally out do Intel on transport speed. This is what AMD needs to overcome their process disadvantages and remain a serious contender for the performance and performance/watt crown (unless Intel just gives up the former to pursue the later). Given AMD's history they very well might pull this off but it's going to be tough.

    Of course there is always the chance of a total shakeup in this industry if either Intel or IBM manages to patent some amazing process trick that isn't easily copied.
  • by Gr8Apes ( 679165 ) on Monday April 23, 2007 @02:39PM (#18843441)
    Intel has already announced major price cuts for the Fall. I can't see how this does anything other than hurt Intel and current sales. For instance, I'm sure I'm not the only one that sees that and goes... hmm, I might have considered a new Intel CPU, but the prices are dropping significantly in a couple of months. And then there's the AMD roll out at the same time, maybe I'll wait and see what that brings to the table.

    It's going to be very very interesting.
  • by Chris Burke ( 6130 ) on Monday April 23, 2007 @03:09PM (#18843875) Homepage
    Sorry, but performance/watt has become one of the major metrics by which CPUs are chosen, especially in business and double especially in business server rooms. Performance/watt is the new performance/$, because wattage tells you how much the hardware is going to cost on a continual basis for both the electricity to run it and for the necessary air conditioning. These costs dominate over the initial cost of the hardware, and are thus more important. Plus, if you have limited space you have a limited heat capacity, and higher perf/watt means you can get more perf in your server room.
  • by Chris Burke ( 6130 ) on Monday April 23, 2007 @06:55PM (#18846981) Homepage
    Intel can't copy AMD's advances. They'd have to license some tech to do so, and that's not very likely (I believe HTT for instance belongs to AMD).

    Actually Hypertransport is an open standard and anyone can implement it. AMD doesn't have the clout to force proprietary standards on the market, so their only hope to have a standard adopted is to make it open and royalty free.

    Which is why Intel will (probably) never implement it. They aren't interested in standards which they don't control. They already don't like the fact that AMD is cross-licensed for all x86 tech, which was part of the motivation for creating the entirely separate IA-64 ISA. When IA-64 failed and Intel was forced to implement x86-64, the only reason they used AMD's spec was because Microsoft said that they would only support one x86-64 ISA, and AMD got their first. Basically it took MS to out-monopoly Intel. So unless they are forced to use HT, they won't, and I can't see any way they could be forced. They may implement something similar -- they will have to in order to address multi-socket scalability -- but it will not be compatible.

    AMD would love for Intel to copy their tech. Every time they do, it makes AMD look like the leader and Intel the follower. You could practically hear the screams of orgasmic joy from AMD when Intel announced EMT64.

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