IBM got wind of Intel's announcement and rushed out their own. The end.
I was skeptical that there really were people who saw them and wondered "Wow, engineers in both companies made these discoveries today?", but a look at the Slashdot story shows the first comment (in my display, anyway) asking "Two breakthroughs in one day?" (Score:5, Insightful)
Intel got wind of IBM's announcement and rushed out their own. The end.
I was skeptical that there really were people who saw them and wondered "Wow, engineers in both companies made these discoveries today?", but a look at the Slashdot story shows the first comment (in my display, anyway) asking "Two breakthroughs in one day?" (Score:5, Insightful)
When am I going to get something the size of an SD card with processor (ARM, >=200MHz), RAM(>=128M), sound(16 bit full-duplex), video (1024x768x24bit), a nice-sized flash HD(>=2G), and contact-headers for IDE & USB ports?
You claiming John Titor [wikipedia.org] works (well, will work) for Intel? That would certainly explain a lot.
Next thing you know we will find out that IBM has had this technology for a while and even used it in the 5100. [wikipedia.org]
Well, it just goes to make your point even more, I'd say. I dunno how many squibs get fired off in a typical Chuck Norris flick but it's got to be in the thousands.
From Intel: High-K Material is a material that can replace silicon dioxide as a gate dielectric. It has good insulating properties and also creates high capacitance (hence the term "high-k") between the gate and the channel. Both of these are desirable properties for high performance transistors. "k" (actually the Greek letter kappa) is an engineering term for the ability of a material to hold electric charge. Think of a sponge. It can hold a lot of water. Wood can hold some but not as much. Glass can't hold any at all. Similarly, some materials can store charge better than others, hence have a higher "k" value. Also, because high-k materials can be thicker than silicon dioxide, while retaining the same desirable properties, they greatly reduce leakage.
No. The substrate that these chips are fabbed on is still silicon. The article is somewhat misleading because it's the gate oxide, which is typically made of silicon dioxide, that's being replaced with the hafnium-based high-k material. I'm loathe to site this as a source but since it has pictures, here [wikipedia.org] is a Wikipedia article that will show you the basic structure for anyone unfamiliar.
I also find it interesting that they are using metal gates instead of polysilicon, considering that metal gates were used in the olden days before the switch to poly.
Uh, the GP never made any claims about the substrate. In fact, GP specifically stated this is the gate dielectric that's being replaced. So, your statement of "no" makes no sense, because you're agreeing with the GP.
Oh, and the reason they're using metal gates instead of poly, can be found courtesy of RWT, last paragraph of the following link
> Uh, the GP never made any claims about the substrate.
The article implies that hafnium is to supplant silicon entirely. The subject line " Silicon Valley will become K-Valley then?" implies something similar.
Semi designers have been trying to ditch polysilicon for years. Back when it was introduced, it was an improvement over metal gates, but that's not the case anymore. Since it's still a semiconductor, you get a depletion region on the poly itself. You can ignore this in large processes, but as things shrink it really starts to have an effect.
I'm curious to know where this leads though. As I understand it one of the largest reasons for abandoning widespread use of GaAs semis was that there was no analog of SiO2. If I am reading these releases correctly, it's the SiO2 that's being replaced by the Ha. So if this is correct, wouldn't a GaAs system using the same methodologies be "doable"?
Forgive my newbie-ness, fab tech isn't my strong suit.
The ease of growing SiO2 initially made it one of the best features of the Si system which is why billions have been spent to mature the industry - they have now reached the point where the rest of the money and time invested into Si technology still makes Si processing far superior to all other materials systems (in the end, Si is cheap and they already have it all working - changing one thing is much easier than moving to a whole different material system).
"I also find it interesting that they are using metal gates instead of polysilicon, considering that metal gates were used in the olden days before the switch to poly." Yup, we used to use metal gates, but the difference in work function between the gate and the silicon caused problems. It gets somewhat confusing, but I'll try to explain briefly. The work function is a basic property of a metal or semiconductor that indicates the distance from the vacuum level to the fermi level of a plain piece of that ma
Ever hear of Ovonic Unified Memory?
http://www.ovonyx.com/tech_html.html [ovonyx.com]
With this technology, silicon may be put into it's place for memory purposes. Bye, Flash.
My only question is, could this be used for processors, given the statement in this link "OUM offers a way to realize full system-on-a-chip capability through integrating unified memory, linear, and logic on the same silicon chip." ?
Do you think this would be a better way to go with processor cache, higher densities, less heat, and semi-equiv
Despite the fact that you decided to go troll on us with how you responded to the parent post, I'll bite since this was something I got to thinking about as well. Higher gate capacitance means that you can get more charge in the channel for a given gate voltage (Q=CV). This can give both higer currents and a reduced threshold voltage, which are good things.
But higher capacitance, of course, slows things down when you get to thinking about those RC time constants. So, do the benefits of higher capacitance o
The improvement is not about increased capacitance in each transistor channel, that would be bad. The capacitance is scpecifically increased in the gate, that means that the gates can be made thicker (less leakage currents = less power consumption) while keeping (or improving) the values for current and voltaje needed to be applied at the gate and the time for the transistor to switch.
The gate itself isn't inherently capacitive, it's the capacitance of the gate/oxide/channel structure that we're talking about, so you can't decouple gate capacitance and channel capacitance. Charge on the gate (which you can think of as the top plate of a parallel plate capacitor) results in equal but opposite charge on the channel (the bottom plate, with the insulating oxide acting as the dielectric). You are absolutely correct that the point in increasing the thickness of that oxide is to reduce leakage
The high-k material doesn't necessarily mean the capacitance of the gate will be higher, that depends on the dimensions of the gate as well as the material. If the thickness of the dielectric was kept constant the cap would go up, but what we're trying to do here is increase the dielectric thickness while maintaining performance. By increasing the dielectric thickness we can put a stop to the quantum tunneling that creates gate leakage. If we did this using the same Si02 gate dielectric it would cause an
Um, by definition the gate _capacitance_ is part of the RC network. The grandparent is right in that if Tox was kept constant then the RC delay would go up.
Right, I was going to say just that before I saw your post. I'm guessing that the capacitance of the interconnect dominates over the gate capacitance in the RC delays? I'm used to the low-speed analog world where we don't worry as much about our interconnect in terms of self capacitance.
I'm guessing that the capacitance of the interconnect dominates over the gate capacitance in the RC delays? I'm willing to wager that most of the time it is. To scale (or keep constant) R the metal aspect ratios are ridiculous, resulting in high lateral cap. Either high R or C drowns out the gate cap (but it's still situation-dependent).
These FETs should be great for analog - no gate leakage, reduced short-channel effects should make current-mirrors/sources a pleasure and the high gm won't hurt an
Well, wouldn't you know it, we just happen to have acquired a rough version of that very presentation. Geeks out there can read up on IBM's breakthrough ahead of time via this PDF [regmedia.co.uk] - a Register exclusive.
Doesn't it suck when someone messes with your timing?
IBM deserves a bit of a jab from the folks at Register whom they fooled for a few days with their "paper release" technology.
It is pretty clear that IBM is desperate. Intel has a ton of momentum, and they have to be stopped somehow, even if it means throwing themselves at the rolling boulder. It seems obvious why they would try to reveal their new tech at the same time, when you keep in mind how much of a lead Intel has at the moment.
See Swann vs. Edison. Swann demonstrated first. Edison had a personal PR department.
It's all about the marketing. However, in that case the battle was asymetrical, not just in marketing, but in time to market. Having shit on the shelves with your name on it is marketing that's pretty hard to trump.
It is pretty clear that IBM is desperate. Intel has a ton of momentum, and they have to be stopped somehow
No. Yes. No.
IBM being six months behind Intel in 45nm tech is pretty meaningless unless Intel uses it to somehow grab more Itanium share, which is unlikely. Other than in Power vs. Itanium they're not direct competitors, and even in that arena, it's like calling the Corvettes and Ferraris competitors. Sure, you may end up buying the other thing, but only if you drastically alter your expectation
I don't understand why you would want to adhere to Moore's law. If I were able to make chips 10 times denser, why would I not market that right away rather than waiting for 3-5 years needed to follow the law.
Moore's law is not a law of the universe. It is merely an average rate of development of an industry. It's like saying cars are 2% more fuel efficient each consecutive year. It wouldn't break any law of the universe to suddenly release an SUV that was 10% more fuel efficient than last year's model.
And similarily, it wouldn't break any law of the universe to suddenly make something go faster than the speed of light (or other such thing considered impossible, if going faster than light is logically impossible), it would simply mean that we were wrong about that "law" of the universe [sciflicks.com].
But yes, I realize that "Moore's Law" would be better named "Moore's Observed Trend that is cited way more than it deserves".
If I were able to make chips 10 times denser, why would I not market that right away rather than waiting for 3-5 years
So, you'd rather sell the next-over generation of chips right away and make x billion dollars, than stretch it out over 3-5 years and make 3-5 times x billion dollars, with you being practically guaranteed to stay ahead of the competition the whole time?
That'll go down really well with the CFO.
"Hey, a goose that lays golden eggs... damn, I'm hungry.."
Largely, the consumer base has been watching the competition between Intel and AMD. Intel is now leading AMD in die size, with 45nm now ready for green light.
From what all the watchers seemed to think, AMD was shaking in its boots with the earlier hints from Intel on the new gate architecture.
But, if you'll notice from TFA: no fewer than two AMD scientists worked on this project. What do you think?
I thought I know most of my elements. I had heard of hafnium, but I had no idea where it was in the periodic table. It is in the transitions, towards the bottom left. You regularly hear of some 'breakthrough' semiconductor made from gallium, aluminium, arsenic, tellurium, buckytubes, Higgs bosons and lard, but this is hafnium with our old friend silicon. Not the first thing you might pick when trying to find a replacement for silicon dioxide. It has a large capture cross-section for thermal neutrons...
Summary... (Score:2, Insightful)
I was skeptical that there really were people who saw them and wondered "Wow, engineers in both companies made these discoveries today?", but a look at the Slashdot story shows the first comment (in my display, anyway) asking "Two breakthroughs in one day?" (Score:5, Insightful)
What actually happened. (Score:1, Funny)
I was skeptical that there really were people who saw them and wondered "Wow, engineers in both companies made these discoveries today?", but a look at the Slashdot story shows the first comment (in my display, anyway) asking "Two breakthroughs in one day?" (Score:5, Insightful)
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When am I going to get something the size of an SD card with processor (ARM, >=200MHz), RAM(>=128M), sound(16 bit full-duplex), video (1024x768x24bit), a nice-sized flash HD(>=2G), and contact-headers for IDE & USB ports?
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Answer is clear (Score:5, Funny)
And they tried to kill Bill Gate's mother, but you'd be suprised how difficult that was.
You'd think 640 rounds of ammo would be enough to kill anybody.
John Titor (Score:2)
Next thing you know we will find out that IBM has had this technology for a while and even used it in the 5100. [wikipedia.org]
Don't mess with Mary Gates (Score:1)
She's one tough lady [washington.edu]!
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640k rounds of ammo ought be enough to kill anybody*.
* Except Chuck Norris.
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Silicon Valley will become K-Valley then? (Score:5, Informative)
Re:Silicon Valley will become K-Valley then? (Score:4, Informative)
I also find it interesting that they are using metal gates instead of polysilicon, considering that metal gates were used in the olden days before the switch to poly.
Parent
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So, your statement of "no" makes no sense, because you're agreeing with the GP.
Oh, and the reason they're using metal gates instead of poly, can be found courtesy of RWT, last paragraph of the following link
http://www.realworldtech.com/page.cfm?ArticleID=RW T012707024759&p=3 [realworldtech.com]
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The article implies that hafnium is to supplant silicon entirely. The subject line " Silicon Valley will become K-Valley then?" implies something similar.
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Semi designers have been trying to ditch polysilicon for years. Back when it was introduced, it was an improvement over metal gates, but that's not the case anymore. Since it's still a semiconductor, you get a depletion region on the poly itself. You can ignore this in large processes, but as things shrink it really starts to have an effect.
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Forgive my newbie-ness, fab tech isn't my strong suit.
Maury
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Yup, we used to use metal gates, but the difference in work function between the gate and the silicon caused problems. It gets somewhat confusing, but I'll try to explain briefly. The work function is a basic property of a metal or semiconductor that indicates the distance from the vacuum level to the fermi level of a plain piece of that ma
Exley, Question (Score:2)
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Try holding the glass right-side up.
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Higher gate capacitance means that you can get more charge in the channel for a given gate voltage (Q=CV). This can give both higer currents and a reduced threshold voltage, which are good things.
But higher capacitance, of course, slows things down when you get to thinking about those RC time constants. So, do the benefits of higher capacitance o
Re:Silicon Valley will become K-Valley then? (Score:5, Informative)
Parent
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You are absolutely correct that the point in increasing the thickness of that oxide is to reduce leakage
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I'm willing to wager that most of the time it is. To scale (or keep constant) R the metal aspect ratios are ridiculous, resulting in high lateral cap. Either high R or C drowns out the gate cap (but it's still situation-dependent).
These FETs should be great for analog - no gate leakage, reduced short-channel effects should make current-mirrors/sources a pleasure and the high gm won't hurt an
I liked the way the Register put it better (Score:2, Offtopic)
IBM deserves a bit of a jab from the folks at Register whom they fooled for a few days with their "paper release" technology.
Isn't it obvious? (Score:1)
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It's all about the marketing. However, in that case the battle was asymetrical, not just in marketing, but in time to market. Having shit on the shelves with your name on it is marketing that's pretty hard to trump.
KFG
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Makes me feel really sorry for the bloke/gal whose name I can't even remember.
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No. Yes. No.
IBM being six months behind Intel in 45nm tech is pretty meaningless unless Intel uses it to somehow grab more Itanium share, which is unlikely. Other than in Power vs. Itanium they're not direct competitors, and even in that arena, it's like calling the Corvettes and Ferraris competitors. Sure, you may end up buying the other thing, but only if you drastically alter your expectation
Re:Isn't it obvious? (Score:5, Interesting)
The first US patent to mention the use of a hafnium oxide as a dielectric [uspto.gov] expires later this year.
Parent
Why Adhere? (Score:5, Insightful)
I don't understand why you would want to adhere to Moore's law. If I were able to make chips 10 times denser, why would I not market that right away rather than waiting for 3-5 years needed to follow the law.
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But yes, I realize that "Moore's Law" would be better named "Moore's Observed Trend that is cited way more than it deserves".
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So, you'd rather sell the next-over generation of chips right away and make x billion dollars, than stretch it out over 3-5 years and make 3-5 times x billion dollars, with you being practically guaranteed to stay ahead of the competition the whole time?
That'll go down really well with the CFO.
"Hey, a goose that lays golden eggs
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Mac transition to Intel (Score:1)
AMD competitive? (Score:1)
What will this do to the price of hafnium? (Score:2)
Whi
So..... (Score:3, Funny)
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