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IBM Hardware

IBM's New Processors To Exceed 5Ghz 250

Posted by Zonk
from the now-you-are-playing-with-power dept.
Jordin Normisky writes to mention the news, via ZDNet Asia, that IBM's new Power6 processor will be unveiled next month at a conference in San Francisco. They're also planning to announce a second-generation Cell, both of which are expected to run faster than 5GHz. From the article: "In addition, the [Power6] chip 'consumes under 100 watts in power-sensitive applications,' a power range comparable to mainstream 95-watt AMD Opteron chips and 80-watt Intel Xeon chips. Power6 has 700 million transistors and measures 341 square millimeters, according to the program. The smaller that a chip's surface area is, the more that can be carved out of a single silicon wafer, reducing per-chip manufacturing costs and therefore making a computer more competitive. Power6, like the second-generation Cell, is built with a manufacturing process with 65-nanometer circuitry elements, letting more electronics be squeezed onto a given surface area. "
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IBM's New Processors To Exceed 5Ghz

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  • by TobyWong (168498) on Thursday January 04, 2007 @02:38PM (#17463050)
    I thought we had finally advanced past the "higher clockspeed = more better" stage...
    • Re: (Score:2, Insightful)

      If new technology presents itself, we may go back to that "stage"
    • Re: (Score:2, Funny)

      by SNR monkey (1021747)
      I was surprised by the flaunting of 5GHz too because I was under the impression we were firmly in the "more cores = more better" era.
      • by TheRaven64 (641858) on Thursday January 04, 2007 @04:57PM (#17465420) Journal
        This is IBM. They were the first people to do dual core. Now everyone is doing it, it's no longer worth talking about. Everyone else, however, is having problems getting past 3GHz, so this definitely is worth shouting about.
      • Re: (Score:3, Informative)

        by NitsujTPU (19263)
        Not really.

        More cores means more threads, which is all fine and lovely, unless you really need a single thread to do something very quickly. Perhaps the algorithm that you are implementing doesn't parallelize well, for instance.
    • by Lord Bitman (95493) on Thursday January 04, 2007 @02:49PM (#17463264) Homepage
      In a race to see who can move all the water from one basin to another...

      "I carry a 1 gallon bucket and run around in circles 5,000,000 times a second. I'm faster!"

      "I carry two 1 gallon buckets and run around in circles 2,500,000 times a second. I'm faster!"

    • Re: (Score:3, Interesting)

      by zensonic (82242)
      We have. If you read whats being said about power6 it hasn't got a deeper pipeline. So nobody knows how they do it. ..... If they actually are able to keep the promises, but thats another story.
    • Re: (Score:3, Interesting)

      by andy314159pi (787550)
      The older power3 chips (350 mhz) can compete with an intel 2.0 ghz chipset for our computations. However because alot of our stuff is very poorly written it caches to disk all of the time and the overall build of the rs6000 machines (and their more current versions) was best at managing the heavy throughput from the disk to fast memory. When we finally got our stuff to use a full 64 bit addressing system and we were able to use all of the fast memory that advantage vaporized for the rs6000 machines. Now
    • Re: (Score:3, Insightful)

      by Binder (2829)
      With Intel's chips that was becoming increasingly true. But for IBM's power processors more clock does indeed mean faster. The Power line already outperformed Intel per clock. With the increase in clock things may get very interesting.
      • by be-fan (61476)
        The Power line hasn't outperformed Intel per clock since the Pentium 4, if you discount applications where the server-sized L3 cache and memory bus of the POWER series comes into play.

        In SPECint*, the G5's per-GHz performance is in the P4 range, maybe a little bit higher. Core 2's per-GHz performance is about 80% higher than that.

        In general, more GHz means more performance for every processor, all else being equal. Any given design is the product of a set of trade-offs. Power is traded versus clockspeed, IP
    • by Lord_Slepnir (585350) on Thursday January 04, 2007 @03:06PM (#17463578) Journal
      ssshhh...I'm currently working on a way to glue a 10ghz crystal on a 8086 chip and (truthfully) sell them as "an x86 processor with a 10ghz clock".
      • Re: (Score:3, Funny)

        by HAKdragon (193605)
        You could always use duct tape. No where in your quote block do you use the words functional or integrated. ;)
    • by Nasarius (593729)
      No...we have advanced beyond seeing clock speed as the sole measure of performance. Obviously within the same processor type, a faster clock = better. I bumped my new E6600 up to 2.88GHz because it achieves significantly higher scores in synthetic and real benchmarks. Unless IBM's architecture totally sucks or is not useful for generic computing tasks, 5GHz is still pretty damn impressive.
    • by Binder (2829) on Thursday January 04, 2007 @03:27PM (#17464018)
      Here are some numbers concerning spec/Ghz.
      IBM/s chips are very good performers / clock and the increased clock should do wonders.
      Intel's P4 for instance was terrible on a per clock basis.

      proc Ghz specint2000 specint/Ghz specfp2000 specfp/Ghz
      opteron 3.0 2119 706.3 2365 788.3
      Intel P4 3.8 1834 483.4 2091 550.2
      Intel Core 2 2.66 2848 1070.6 2673 1004.8
      IBM Power5 2.1 1747 831.9 3324 1582.8

      please forgive the nasty table

      • by dreddnott (555950) <dreddnott@yahoo.com> on Thursday January 04, 2007 @04:29PM (#17464982) Homepage
        CPU         GHz   specint2000 specint/Ghz specfp2000 specfp/Ghz
        Opteron     3.0   2119        706.3       2365       788.3
        Intel P4    3.8   1834        483.4       2091       550.2
        Intel Core2 2.66  2848        1070.6      2673       1004.8
        IBM Power5  2.1   1747        831.9       3324       1582.8

        I gave myself a headache trying to read your table, I hope you don't mind. I also apparently missed the 3GHz Opteron launch in '06...but things still don't look good for AMD.
        • Re: (Score:3, Insightful)

          by RzUpAnmsCwrds (262647)
          K8L is going to bring IPC improvements to Opteron, along with L3 cache and native (single die) quad-core.

          AMD is all about the platform now. That's why they purchased ATI. It's about bringing CPU, GPU, and other specailized processors together using a fast, flexible bus (HyperTransport).

          AMD is also about low-cost. Remember that current Athlon 64 CPUs have about half as many transistors as their Core 2 Duo counterparts. CPU + GPU + Northbridge in a single CPU (AMD Fusion) will have huge impact in the low-end
          • by dreddnott (555950) <dreddnott@yahoo.com> on Thursday January 04, 2007 @06:00PM (#17466412) Homepage
            I do understand that AMD approaches the multi-core issue and SMP in general a bit more elegantly than Intel, and that this has a lot to do with HyperTransport, but Intel just beat them at their own game and they will have a lot of work to do in the *NEAR* future to get back to where they've been since the launch of the Athlon processor (first to 1GHz, first to seamless 64-bit x86 desktop among their most shining achievements).

            AMD wasn't very much about low-cost for the last couple of years - FX and X2 chips were historically overpriced until Core 2 hit the scene - there was a 40%-60% price drop on the X2 dual-core chips at about that time if you'll recall. That means two things to me: insane profit margin and no need to compete with the floundering NetBurst.

            CPU performance matters tremendously. Application performance disk-bound? Don't make me laugh. My system has 2GB of system RAM, as I hope today's Vista-ready machines do - when I load a large program (like a game) that I've already loaded since my computer has been turned on, it doesn't even read the HDD, nor does it jitter when loading new areas in games like Oblivion. I turned off my page file a long time ago. User input bound? Maybe if you're writing INPUT N$ statements in BASIC. Don't forget that Vista is around the corner for most of the world, no matter how bad it is.

            DDR2 didn't help or hurt AM2 very much so I don't think memory subsystem bandwidth (or latency) is your answer either. Don't forget that media encoding, scientific applications, CAD, and gaming are what sells the high-margin computers that both Intel and AMD care a great deal about, and what drives technology in general (they can't sell if it they can't market it). AMD still has a relative deathgrip on the 8-way server market but its hold on 2- and 4-way servers that it rightfully wrested from Intel's grasp is rapidly slipping away due to Woodcrest and Kentsfield's rather nice performance per watt.

            HTX slots might be an interesting toy for the future, and perhaps wonderfully applicable to server/render farms, but I don't see a product or a killer app yet.
            • Re: (Score:3, Insightful)

              by Khyber (864651)
              Killer Product or App using an HTX-slot card? I can maybe answer the product part - HTX Graphics cards. Pure HyperTransport bus access, huge clock and loads of bandwidth, can literally be used as a universal bus across the entire system (using different pinouts for different types of devices, internal or external,) and maybe perhaps the bus has enough bandwidth (assuming programmers program cleverly and optimally,) to allow for massive things to occur at once, like running a rendering server, play a game, e
      • by imsabbel (611519)
        You should never forget that those power5 values are "slightly" boosted by the fact that they use 128Mbyte l3 cache....
        • by be-fan (61476)
          The current version fo SPECint really can't take advantage of anything bigger than a 4MB L2 cache. On the other hand, it should be noted that those POWER5 numbers are with IBM's XLC compilers, which are a lot better relative to GCC on PowerPC than Intel's C compiler is relative to GCC on x86. Also, POWER5 is very sensitive to workload and instruction ordering, so you're going to see lesser performance a lot more often than with Core, which is designed to handle the huge variety of poorly-scheduled code floa
    • by Cutie Pi (588366) on Thursday January 04, 2007 @03:30PM (#17464062)
      Keep in mind that Power chips are used in high end servers, not commodity PCs. Given the expense of these servers, it's likely that the "OFMG 5GHZ!!!!111" reaction that typifies that commodity PC fanboy market does not apply. I doubt that IBM is sacrificing performance just to market 5GHz speeds (like Intel did with NetBurst).
      • by Ilgaz (86384)
        I think everyone is racing with Sun on (high end) server markets, all enterprise sites and existing server customers seem to love Sun Niagara CPU especially because of heat and performance per watt stuff.

        " The entire chip consumes a maximum of 72 watts, considerably less than rivals such as Intel's Xeon, which consumes 110 to 165 watts."

        That monster runs 32 threads btw.

        Their customers seems to adopt when its available http://preview.tinyurl.com/y6z3z6 [tinyurl.com] (CNET story)
        • Last stats I saw IBM was winning in the Unix/Linux server market. I have not seen stats since the release of Niagra, which appears to be a nice CPU for multi-process/multi-threaded environments. Do you have sales/market share stats to support your statement?
    • There are clock speeds and there are operations. I know what an operation is, but how are cpu clockspeeds rated? Is it just something as silly as their clock source? By defination it is "cycles per second", but what exactly is cycling? I've always been confused by this and I think I just don't understand how digital processors work enough.
      • Re: (Score:2, Informative)

        by dreddnott (555950)
        That's all right, I still find myself stumped by analog processors, like the valve body in a GM 700R automatic transmission. *shudder*

        Anyway, here goes:

        Basically they take a tiny wafer-thin piece of silicon, use chemical to scrape out millions of little transistor shapes onto its surface, and strap a buckin' bronco of a clock crystal on it that shakes it like a salt shaker, or like jello jigglers on free-based cocaine.

        Thusly, the outrageous oscillating action of Mr. crystal causes the tiny transistorized ci
      • Yup, just the clock speed. You want something like FLOPS (Floating Point Operations Per Second) or MIPS (Million Instructions Per Second) for a slightly more menaingful comparison, but that still suffers from neglecting to compare efficiency in parallel pipelines, accuracy of pre-fetches, etc.

        Make's AMD's "Athlon XP 2400" marketing seem a little less deceptive when you realize that their GHz were getting more things done than Intel's GHz, doesn't it?
    • by pclminion (145572)

      So what are you suggesting? That we only optimize the "most important" aspect of a computer system? Please, could you define what that worthy aspect is?

      Computing performance is based on many factors. Clock speed is WAY up there on the list of importance. Just because it might not be the most important in an objective sense is no reason to stop trying to improve it.

  • by larry bagina (561269) on Thursday January 04, 2007 @02:40PM (#17463088) Journal
    Usually from the bell-end of Apple. I wonder if IBM's fab plants can cash the check their PR department writes.
    • by SengirV (203400) on Thursday January 04, 2007 @03:00PM (#17463478)
      Exactly, Has IBM yet hit the 3.0 GHz they promised Apple 3 years ago?
      • by HAKdragon (193605)
        The Xenon processor in the XBox 360 is a triple core PPC based chip that's clocked at 3.2Ghz.
    • Re: (Score:2, Informative)

      by tppublic (899574)
      I wonder if IBM's fab plants can cash the check their PR department writes

      These are the engineers, including at least one IBM Fellow (the second author)... this is not the PR department. I expect these folks would not take their reputations in the engineering community lightly.

  • Products (Score:3, Funny)

    by FadedTimes (581715) on Thursday January 04, 2007 @02:41PM (#17463120)
    If I owned an as/400, i/z series server, maybe this would be exciting news as a future upgrade.

    • by mnmn (145599)
      You may not have an AS400 like I do, but your kids might ask for the next Xbox.
    • pSeries, iSeries, and zSeries, are still hard at work doing same they have always done, running banks, distribution centers, and the like. The difference is that mini's and mainframes don't need glossy magazines so that people know they get work done, they just do it.

      If you look at the direction AMD is going you will see the archietecture so common in the mini/mainframe areana is coming down to the home.

      It was always hilarious to hear the network guys brag about their 4-way network tower with its 8gb plus
    • 4 core POWER5+ pServer running Linux is $5,500
  • by mr_stinky_britches (926212) on Thursday January 04, 2007 @02:43PM (#17463152) Homepage Journal
    But do they achieve a comparable amount of work per cycle?

    --
    Wi-Fizzle Research [wi-fizzle.com]
  • by deviantphil (543645) on Thursday January 04, 2007 @02:44PM (#17463172)

    The smaller that a chip's surface area is, the more that can be carved out of a single silicon wafer, reducing per-chip manufacturing costs and therefore making a computer more competitive. Power6, like the second-generation Cell, is built with a manufacturing process with 65-nanometer circuitry elements, letting more electronics be squeezed onto a given surface area.

    The cost of making chips, by far, is the R&D cost. The "first" chip costs hundreds of millions to make. Once the "first chip" is made the margin cost is VERY low. Beyond recovering R&D costs....the rest is just distribution channel costs....then....PROFIT!
    • Size matters (Score:5, Insightful)

      by overshoot (39700) on Thursday January 04, 2007 @03:08PM (#17463618)
      Once the "first chip" is made the margin cost is VERY low.

      Boy, Howdy! are you out of the loop. I work on those suckers and believe you me, the chip cost is not trivial.

      Do the math: the cost of a 300 mm wafer in a 65 nm process runs well over $5000 (how much is a Deep Dark Secret.) Ignoring geometric yield loss, that's about 70,000 mm of potential dice per. If one chip is 350 square mm, you're getting about 200 per wafer, or $25 per chip fab cost. Yield drops off steeply with size (think in terms of losing ten to twenty dice per wafer, regardless of die size) and that adds into the fab cost too.

      That's bare minimum, assuming there aren't any bad lots etc. It adds up fast.

      • by tacocat (527354)

        I don't think he was every in the loop. It's been like this since the first Apple Lisa's came out and before. Material cost and manufacturing costs are far from trivial.

      • Re: (Score:3, Informative)

        by Binder (2829)
        Look at it this way. To design a high end chip...
        * software for synthesis, implementation, timing/physical/formal verification, OPC, power/temp analysis and all the other stuff runs in the millions of dollars.
        * 20 engineers working for 3 years + benefits/managers/other overhead ~10 million dollars.
        * mask costs 100's of thousands of dollars.

        so getting to the first chip runs at least 15-20 million dollars and for something like the core2 duo it's closer to 500 -1000 million.

        the next wafer only costs a measly
        • so getting to the first chip runs at least 15-20 million dollars and for something like the core2 duo it's closer to 500 -1000 million.

          Yup. And your point is ... ?

          the next wafer only costs a measly 10k

          And the next million wafers cost how much?

          Nobody builds stuff like that with a run rate of a few measly thousand. No way to recover the NRE. If the variable costs don't dominate the bugetary numbers, then the project doesn't get authorized.

          By the way:

          software for synthesis, implementation,

    • by rrohbeck (944847)

      Once the "first chip" is made the margin cost is VERY low.
      ... assuming you get decent yield. I once read that high single digit percentages were considered good when starting up a new process technology. With smaller feature sizes this can only get worse.
  • by mnmn (145599) on Thursday January 04, 2007 @02:44PM (#17463180) Homepage
    They would get bragging rights with 45nm. 65nm is so old that even AMD has 65nm chips now.

    Heck philips/motorola I believe have been producing 65nm microcontrollers, and samsung is producing 50nm flash chips.

    And 5GHz should not be difficult considering it doesnt have the x86 overhead, is more RISC and that generally PPC has a simpler core. I'll be interested if it comes with quad cores or more.
    • by leoxx (992) on Thursday January 04, 2007 @04:01PM (#17464588) Homepage Journal
      You do realize that the CURRENT generation of POWER5+ CPU's are already quad-core [ibm.com], right? Honestly, guys, you all need to read up on what makes POWER [wikipedia.org] different from PowerPC [wikipedia.org]. One is a server or workstation class chip, the other is a desktop class one.
    • Re: (Score:2, Insightful)

      by hump_ (125049)
      producing 65nm microcontrollers, and samsung is producing 50nm flash chips.

      Fair enough.

      But do these chips come with 32Mb of L3 Cache, have the fastest Fiber Channel Bus Interconnect in the market, and allow for extremely flexible, multi-platform OS true hardware virtualization?

      Performance comparisons between x86 and RISC chips in my opinion are really not valid. What you really want to look at is system workload. Scalability is where the POWER chips really perform and these chips are designed for the

  • by markov_chain (202465) on Thursday January 04, 2007 @02:45PM (#17463194) Homepage
    ...undisturbed 802.11a networking!
  • by User 956 (568564) on Thursday January 04, 2007 @02:45PM (#17463202) Homepage
    They're also planning to announce a second-generation Cell, both of which are expected to run faster than 5GHz.

    Why don't they seem to be making any kind of performance comparisons? Talking about physical size, power consumption as compared to intel & AMD are great, but it seems weird that there's no mention of real-world performance against those same competitors. Even a rough estimate would be interesting.
    • They're also planning to announce a second-generation Cell

      Why don't they seem to be making any kind of performance comparisons?

      There've been no firm figures since the Frieza chip reached end-of-line. Exactly how much higher Cell-2 rates than Cell-1 is hard to say, although Piccolo/Kami in an SLI configuration falls somewhere between. The Bejita-SSJ+ beats both on all benchmarks, and Cell-3 'Perfect' beats everything unless you overclock a Gohan to the undocumented and unsupported SSJ2 setting.

  • I think I know how they're doing the clocking -- they presented on that at ISSCC [isscc.org] two years ago.

    There should be some really interesting stuff this year on how they kept the power down.

    Of course, a chip nearly 2 cm on a side is going to be a beast no matter what. This is going to be fun!

  • Yeah! (Score:5, Funny)

    by radu.stanca (857153) <radu,stanca&gmail,com> on Thursday January 04, 2007 @03:01PM (#17463488) Homepage
    In your face, Steve Jobs!
    • by parvenu74 (310712)
      Not exactly. IBM has only announced this chip and from what I have seen it's not even a PPC chip anyway. Apple is CURRENTLY shipping dual core Xeon systems and will more than likely announce quad-core systems next week, similar to systems already shipping from PC makers like Dell. By the time the Power6 makes the jump from vaporware to reality we might see an 8-core Intel chip shipping in the high end Macs.
  • by Sarusa (104047) on Thursday January 04, 2007 @03:09PM (#17463630)
    It would be ludicrous, but Kutaragi's talked before about never reducing the price of the PS3 but instead upgrading it with more memory, bigger hard drives, etc. It would be pretty damned amusing if, a year and a half after PS3 launch, instead of cutting prices with a new easier to produce Cell and Blu-ray they upgraded the PS3 with the Cell2(and hosed everyone who'd already bought one). This would be so stupid and arrogant that it's only plausible because it's Sony.
    • by DrXym (126579)
      Even if it were true, how would it be arrogant? It's exactly what the likes of Dell, Apple, Compaq etc. do.
      • by Sarusa (104047)
        Yeah, it's sort of expected in the computer world. When you buy a console, though, you expect your investment to last for 4-5 years or so. You don't expect that you have to upgrade your PS2 or the hottest new games won't play on it because it's last year's PS2. IF they did it it would be a whole new trend of badness like MS started with the two levels of console pricing.

        (Though now I remember the RAM expansion pack for the N64...)
      • Consoles are supposed to be static platforms that last about five years. If Sony kept the PS3 updated, it would require games to have system requirements and everyone would have to keep up with hardware demands every year. Along with the downloadable game updates that are becoming common these days, it would be the final merging of the hell of PC gaming with the once-great console eden.
  • So what if IBM's new chips run at 5GHz or more? What about gigaflops?

    I had hoped the majority of slashdotters would be able to see past the megahertz myth by now.

    Apparently not.

  • by iPaul (559200) on Thursday January 04, 2007 @04:14PM (#17464768) Homepage
    In the world of technology a promise of more/better performance counts as much as a drunken "I love you." One reason why Apple jumped from PPC is that IBM failed to deliver a 3.0 Ghz chip within a reasonable time frame (in the PPC970 series) and completely failed on delivering a laptop chip. Believe it when you actually see shipping servers.
    • The chips are already in production, this is the very end of the cycle on these. Keep in mind that while many seem to relate this to PPC, this is really the POWER line targeting servers and IBM has been traditionally pretty accurate with their statements regarding POWER4, POWER5, POWER5+ in the past.
      • by iPaul (559200)

        I just went through the IBM site and it seems their shipping architecture is Power5+ at about 2.0 to 2.5? Ghz. While I'm not disputing that IBM is capable of jumping to 4Ghz on the first series of Power6, I take a very skeptical approach to performance promises. Given the delays on the first series of the Cell, I'd definitely take a wait and see on that one.

        I'm also extremely skeptical of (production) 80 core x86_64 chips, BTW.

  • Low power consumption, PPC, fast. Can we have this in a laptop please?
  • by owlstead (636356) on Thursday January 04, 2007 @06:09PM (#17466528)
    I haven't checked the information yet, but here's an abstract on the rest, found through google:

    The Power6 processor will run between 4GHz and 5GHz and it has been proven to chew away data at a speed of 6GHz in the lab.

    IBM see things a little differently and they decided to raise the frequency in both cores of the processor.

    For high-end models, four POWER6 MPUs will be packaged in a single multi-chip module, along with four L3 victim caches, each 32MB.

    On the management side, IBM is also improving their virtualization capabilities in the POWER6. In particular products, a single processor may be able to host 2-300 virtual instances, although theoretically up to 1024 VMs are possible. Memory partitioning and migration have been added as well, which reduces system down time for repairs.

    IBM is claiming a factor of two performance increase, which would be consistent with the vastly higher clockspeeds and increases in raw system bandwidth.

    IBM's roadmaps currently include the POWER6+, which is presumably a 45nm derivative product. Judging by past practices, the POWER6+ will debut in the second half of 2008, probably just in time to dash the hopes of rivals.

    The Power and PowerPC lines will grow one step closer together with Power6, which incorporates the AltiVec instruction set that speeds up many multimedia tasks. AltiVec, also known as VMX, increases efficiency by letting a single processing instruction be applied to multiple data elements. That's helpful for video and audio tasks on desktop machines, but servers will benefit as well in, for example, high-performance computing tasks such as genetic data processing, McCredie said

    Where Power5 can transfer data on and off the chip at a rate of 150 gigabytes per second, Power6 can do so at 300GBps, McCredie said.

    Oh, and it is also good for BCD's (binary coded decimals) which obviously points to the expected customers (high end financial firms, presumably).

    Sources:
    http://news.softpedia.com/news/New-Power6-IBM-Proc essor-Trashes-Competition-with-6-GHz-17765.shtml [softpedia.com]
    http://realworldtech.com/page.cfm?ArticleID=RWT101 606194731 [realworldtech.com]
    http://news.zdnet.com/2100-9584_22-6124451.html [zdnet.com]

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