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Intel Power Hardware

Intel Developing Ultra-Low Power Chips 145

Posted by Zonk from the low-powered-smartness dept.
ErikPeterson wrote to mention a C|Net article discussing Intel's development of low-power chips for mobile applications. From the article: "The chipmaking giant announced on Monday a new technique that it said could help cut back on wasted battery power in cell phones and mobile devices by as much as 1,000 times current levels. Active computing accounts for only half the power Intel processors use. The other half is gobbled up by a leakage current in transistors that exists when a machine is in a low-level sleep state, Intel said. The new version of the company's 65-nanometer wafer-making process, internally known as P1265, is better than Intel's current process at helping prevent the extra power from being sapped from the battery, the chipmaker said. "
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Intel Developing Ultra-Low Power Chips More

Intel Developing Ultra-Low Power Chips

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  • 1/1000th? (Score:4, Interesting)

    by biryokumaru ( 822262 ) * <biryokumaru@gmail.com> on Tuesday September 20, 2005 @06:15PM (#13609091)

    Random quotes:
    "1,000 times current levels."
    "The other half [of the energy] is gobbled up by a leakage current in transistors"
    "designed to consume a tenth of the power"
    "about a tenth the demand"

    "About two years ago, the Intel process and development groups decided to find out if they could expand the space or the scope that 65-nanometer technology could serve and make adjustments so it could make a chip with extra-low leakage."

    Um, so, wait, making chips with extra low transistor leakage, where leakage is only half of the chips power consumption, can result in one tenth power consumption? And even, 1/1000th what some chips use? 1/1000th the power consumption of what, a penny in the circuit breaker?

    • Random quotes: "1,000 times current levels."

      "The other half [of the energy] is gobbled up by a leakage current in transistors"
      "designed to consume a tenth of the power"
      "about a tenth the demand"

      Re:1/1000th?
      Um, so, wait, making chips with extra low transistor leakage, where leakage is only half of the chips power consumption, can result in one tenth power consumption? And even, 1/1000th what some chips use? 1/1000th the power consumption of what, a penny in the circuit breaker?

      Don't bother to emphasi

    • Re:1/1000th? (Score:5, Informative)

      by merreborn ( 853723 ) on Tuesday September 20, 2005 @06:29PM (#13609203) Journal
      It's not that confusing. A current intel chip spends half it's power consumption on computing, and wastes the other half. This new process reduces that waste to 1/1000th of what it was -- if a chip used to consume 2 watts, 1 on computing, 1 on waste, now it will consume only 1.001 watts, 1 on computing, .001 on waste. The "designed to consume a tenth of the power" is about a completely unrelated processor: the next generation of Pentium M is supposed to consume 1/10th the power it currently conusmes. Score one for reading comprehension.
      • So, this power "used for computing". Where does it go?
        • The only power that could reasonably be said to be "used for computing" is that required for the concomitant entropy change. That is a miniscule fraction of the power consumed by any cpu.

        • Re:1/1000th? (Score:4, Informative)

          by merreborn ( 853723 ) on Tuesday September 20, 2005 @06:59PM (#13609427) Journal
          So, this power "used for computing". Where does it go?

          Ah, I finally understand your misunderstanding. When they say half the power goes to active computing and half to waste currently, they mean half of the power consumption occurs while your CPU is crunching numbers, and half while it's just idling.

          In both cases, power is dissipated as heat. All they've done is something along the lines of turning the processor off when it's not actually crunching numbers.

          They haven't magically done away with resistance, or anything like that.
          • So where did they get this 1/2 figure? Wouldn't this depend strongly on how you're using your computer? If you're playing a FPS, it would be more like > 95% used for active computing and 5% wasted. Maybe that 1/2 figure is for very light usage like loading a small web page every 5 minutes.
            • It's not related to processor usage, it related to representation of zeros and ones. The ones will still take just as much power. The zeroes won't take as much. You see, leakage current is the current that flows through transistors that are turned off. They are making those transistors NOT waste the energy that they leak.
              • And how do they know how many bits are ones and how many are zeroes? I don't think the numbers are exactly equal at any given time.

        • Re:1/1000th? (Score:5, Informative)

          by Suidae ( 162977 ) on Tuesday September 20, 2005 @07:03PM (#13609463)
          Into heat as the charge is dumped to ground, generally. Basicly you charge up a cap to indicate a logical 1 (or zero, if you prefer). When you want to make it a zero, you dump the charge to ground and you lose the energy, increasing the local entropy.

          There are designs and a few working prototypes that recycle some of that energy, but they are more complex than regular chips. Basicly the idea is that in a given processor you'll have a bunch of gates turning on and off at any given time, so you can save some power by dumping charges from gates going from 1 to 0 to gates going from 0 to 1. Its really a heck of a lot more complicated than that though.

          The field is called reversable computing [wikipedia.org]and has a lot of potential to reduce power requirements of logic devices.

        • Re:1/1000th? (Score:5, Informative)

          by TigerNut ( 718742 ) on Tuesday September 20, 2005 @07:04PM (#13609468) Homepage Journal
          In a CMOS chip, the power consumption is a function of two major items: The leakage current, and the switching current. The leakage current is a function of the operating voltage and the device geometry size. Going smaller and lower voltage has increased the leakage current to the point where it's a roadblock to further development, so Intel is now apparently addressing it... that's good. The switching current comes about because the CMOS logic state for any node is controlled by either a transistor connecting the node to the supply rail, or a different transistor connecting that node to the ground rail. When the node is switched from one rail to the other, there is a brief period where both transistors partially conduct, and the current goes up dramatically. Hence, the more switching that goes on, the more rapidly, the more current is used, and that's the "power used for computing". The switching current is reduced by, among other things, lowering the operating voltage, which puts it at odds with the reduction of leakage current.
          • Well, kudos for the informative reply I guess, but the truth is that I already knew most of this. That all sounds to me like waste due to various inefficiencies in the CMOS device, not power that is necessarily required for any type of computation. Thus the talk about "power used for computation" wasn't making any sense to me. The OP clarified that they were talking about idle power vs. active power, which makes things much more sensible.
          • When the node is switched from one rail to the other, there is a brief period where both transistors partially conduct, and the current goes up dramatically...

            Ah, no. What you're referring to is called shoot-through and is more of a problem in power switching circuits (half/full-bridge/etc.). Shoot-through in this type of circuit can potentially cause destruction of the transistors due to the large amount of current passed by typical low-resistance MOSFETs tied to each supply rail.
            The switching lo
            • I was remiss in not mentioning the gate capacitance, since that is the major contributor to the dynamic power consumption in a large CPU, but 'shoot-through' is a significant factor in any high speed CMOS design, even when the process has been tweaked to minimize its occurrence. As an example, the TI MSP430 has a feature where the I/Os that can be configured as either analog or digital inputs, can have the digital inputs disconnected in order to eliminate the extra power consumption that would occur due to
    • It'll run with your blood sugar.

    • Re:1/1000th? (Score:5, Informative)

      by InvalidError ( 771317 ) on Tuesday September 20, 2005 @09:38PM (#13610407)
      An idle P4 wastes 10-15W of static power (maintaining its current state, like when the computer is in standby/sleep mode... this is why we have suspend-to-RAM and hibernate), 15-30W in clock distribution and uses 30-60W more for switching transistors while doing useful work.

      Since a CPU is not operating at full-speed and full-load 100% of the time, reducing the average quiescent+clock power by 10X could already extend battery life by a substantial amount - how many people run SETI (or comparable non-essential extensive computational load) on their laptops while operating on battery power?

      So, if static power and idle clock power are reduced to practically nothing, even if that power accounts for only half of the chip's budget it can decrease the CPU's average power by 10X, assuming the CPU spends ~90% of its time idling on average.

      BTW, if you look at typical battery discharge curves, you will see that the effective AH rating depends on load current... so a 50% reduction in system power would come with a ~10% bonus in usable battery capacity. (Batteries are usually rated for 20H discharge and 12AH batteries typically have an effective rating of 7-9AH when drained at ~50A.)
  • How about reducing the heat first?? Or does Intel want to enter the space heater market?

    -Digital Madman

    • Re:Power??? (Score:2, Informative)

      by GigsVT ( 208848 )
      Power dissipated=heat. Hint: Both are measured in watts!

      • Re:Power??? (Score:1, Informative)

        by dusanv ( 256645 )
        No, heat (or energy) is measured in J (Joules) or BTUs. Power is measured in W (Watts). Power = Energy / Time.
        • 1 Joule = 1 Watt * 1 Second, so wattage is related to waste heat.

        • Re:Power??? (Score:5, Informative)

          by Monkelectric ( 546685 ) <slashdot AT monkelectric DOT com> on Tuesday September 20, 2005 @08:14PM (#13609941)
          Allow me to politely correct you. Joules is a discreet measurement of energy. 0.2389 Calories, or energy required to lift 1kg 0.1 meters.

          A watt is a joule/second. Processors do not emit energy discretly, but rather over time, therefore the appropriate measurement is a rate, thus, heat dissipation is measured in watts.

          Joule is only an appropriate measurement for discreet things ... such as, "the chemical reaction consumed 30 joules of energy."

          A good analogy would be, how many miles of gas did you use to goto work? 10 gallons ... How much fuel does your car use? 10 miles per gallon, which again, is a RATE. The answer to "how much fuel does you car use?" is not 10 gallons. Its 10 miles per gallon.

          In the same sense, a processor doesn't dissipate 30 joules of energy, it dissipates 30 joules per second, and the word for "joules per second" is WATT :)

          • it dissipates 30 joules per second, and the word for "joules per second" is WATT :)

            Yes of course, I meant heat dissipated (or rate of heat dissipation if that satisifes your nitpicking) and power consumed are both measured in watts, because they are the same thing in something that doesn't do work like a CPU.

          • Re:Power??? (Score:1, Informative)

            by lee1026 ( 876806 )
            energy required to lift 1kg 0.1 meters = 0.98 J not 1 J

          • Re:Power??? (Score:3, Informative)

            by dj245 ( 732906 )
            Allow me to politely correct you. Joules is a discreet measurement of energy. 0.2389 Calories, or energy required to lift 1kg 0.1 meters.

            Allow me to politely correct you. A calorie is a a discrete measure of energy. A Calorie (big C) is also known as a "food Calorie" and is 1000 calories. To avoid confusion calorie the base unit is always written with a lower case c. .0002389 Calories (big c) are required to lift 1kg 0.1 meters.

            • I think its a universl rule that its impossible to be 100% correct when correcting someone else. I tried REALLY hard to keep it together, but missed that one... thanks :)
          • 10 miles per gallon isnt a rate, its an environmental crime!
          • I was just pointing out to the grand parent that power and heat aren't the same. There is noting to correct so relax please...
    • Yes the magic heat which has absolutely nothing to do with the power consumption. Its not like the power consumed is converted to heat or anything like that...

      I'm sure they'll be worrying about it as soon as they find where that darn magic is coming from.
    • Thermo anyone? Every watt you put in that chip goes somewhere. What do you think most of it leaves as?
       
      Less power == Less heat.
    • Power???

      How about reducing the heat first?? Or does Intel want to enter the space heater market?

      You reduce the power you reduce the heat.

  • I'll bet Apple knew about this... (Score:5, Interesting)

    by PapayaSF ( 721268 ) on Tuesday September 20, 2005 @06:21PM (#13609143) Journal
    ...when they decided to switch to Intel. When the switch was announced, my question was: "Hmmm, I wonder what Apple knows about Intel's plans that they can't or won't talk about?" This certainly looks like something that would fit with Apple's future plans regarding iPods and other mobile devices.

  • Leakage? (Score:5, Funny)

    by kko ( 472548 ) on Tuesday September 20, 2005 @06:24PM (#13609172)
    Are these those famous Olestra chips everybody talks about?

  • To summarize the story... (Score:5, Funny)

    by slashname3 ( 739398 ) on Tuesday September 20, 2005 @06:24PM (#13609173)
    So the article basicly says they plan to make chips that don't suck so much.....



    power that is. :)

  • Apple Powerbook with lower power consumption? (Score:4, Interesting)

    by lightningrod220 ( 705243 ) on Tuesday September 20, 2005 @06:25PM (#13609177)
    I would really be interested to see what Apple can do with this. However, they need to make sure that the heat is as minimal as possible. I'm getting tired of even the G3 iBooks getting wayyyy too warm, let alone the G4 'books. We need to get those temperatures down, power consumption down (seems like these new chips will do that), and make the Lithium Ion batteries last longer, so we don't have guys putting "Powerbook batteries last only 18 months!" everywhere.
    • The G3 in the iBook (an IBM 750FX or something like that) draws 6 watts at 900Mhz.

      That's six.

      The heat's not really coming from the CPU in an iBook. In fact, the fan barely comes on - only in the most extreme temperatures (say using the laptop on a soft durface like a sofa or a bed when the air tempertaure is up in the "Baghdad August" range).
      • I have found that the hard drive is the bigger "heat-up" culprit in G3 iBooks/PowerBooks.

        When I upgraded the hard drive on my Clamshell I purposely picked one known for low running temperature. Ergo, no "hot leg syndrome." Maybe "warm leg" but not hot.

        However: the CPU starts becoming an issue with G4 lappies. As it does with even the Pentium M. And a P4 lappie does dual duty as a hotplate. Handy for those living on-campus. ;-)
        • Sorry to burst your bubble hear, but portable's are not designed for laps, are compared to intel notebooks it produces far less heat. Even the G4s produce far less heat than intel boxes, but it still would be nice to see a notebook where the fan never kicks on yet runs at a decent speed (like a 1.67 G4 or a 2.4 P4M or equivalently rated).
  • AMD soon follows up with the patented and trade marked...

    MUH MUH MUH MONSTER LOW Low low chips.

    I'd stick with low power instead of ultra low its just sounds less like sensationalism (perhaps because it is less like sensationalism)
    • I think the naming scheme works. Regular chips in all notebooks. Low-Voltage chips in your ultraportables. And the Ultra-Low-Voltage in you palmtop and other small devices. It breaks up pretty nice.
  • Just re-release the P66.

  • Good but... (Score:2, Funny)

    by coopaq ( 601975 )
    Everytime I here this I think:

    Intel Developing Ultra-Low Power Chips= Intel Developing Ultra-sLow Power Chips

  • If half of the current power is used by the computing, and half by heat.

    1000 times less means 500 times slower ?

    Or am I missing something ?

    • Re:How does 'half' = 1000 times less (Score:5, Informative)

      by dancpsu ( 822623 ) on Tuesday September 20, 2005 @07:16PM (#13609556) Journal
      Okay, a little chip power management 101.

      First, chip power can roughly be divided into two components:

      1) Switching - When the transistor is going from high to low, or low to high

      2) Leakage - When the transistor is "off" but still letting through a little current

      Since CMOS was first put into play, two transistors per state have made things as low power as possible. The line between power and ground is controlled by two opposite mosfet trasistors, one that switches high, and the other that switches low. Since they are opposite, one of them is always "off" so that it doesn't allow current through.

      *HOWEVER* even with at least one transistor off, a little current always gets through. This is called leakage. While larger transistors only let through a little current, smaller and smaller transistors became leakier and leakier. So while earlier processors had only a little power used for leakage, according to the intel report, this has risen to 50%.

      But, you can still make those larger transistors, so you can still prevent the leakage, you just need to have them stop leakage current when you're sure that certain parts of the chip will be "off" for a while. Apparently, intel has found a way to use some architectural method to put these larger transistors in place to reduce leakage current to 1/1000th the amount it would be otherwise.

      So now the power can be reduced by nearly the entire amount of the previous leakage current, or nearly the entire 50% that leakage was taking up. In all of this, you shouldn't lose any processing power, because the frequencies are all still very fast, and even though the larger transistors take more time to switch, these will not be the ones performing your actual calculations.
      • Guess I should have read the article first. They are changing the transistor fabrication process--not putting in larger gating transistors--to make the leakage current less. The new transistor process has 1/1000th the leakage, but switches at half the rate. Intel thinks it's a good compromise for low-power situations.

        • Guess I should have read the article first.

          This is Slashdot. It's not even a requirement that you actually be able to read.

          They are changing the transistor fabrication process--not putting in larger gating transistors--to make the leakage current less. The new transistor process has 1/1000th the leakage, but switches at half the rate. Intel thinks it's a good compromise for low-power situations.

          I think Intel is finally starting to make sense again. Yes, this is a very good plan.

      • "So now the power can be reduced by nearly the entire amount of the previous leakage current, or nearly the entire 50% that leakage was taking up."

        Yes - which is half ... where does the other 500 times come in :)

        i.e. start at 100%, aiming for 0.1% ... you have us at 50%.

        "to reduce leakage current to 1/1000th "

        Not exactly the wording that I see :)

        BTW - it was meant to be tongue in cheek at Intel ... but lets see where it goes :)
      • Actually, this has more to do with Intel pushing a . They expect leakage to be reduced by over 100 times. [intel.com]

        Basically, the article is simply parroting what the Intel marketing department has been told by their engineers: that leakage current will be reduced by allmost 1000 times. The Intel marketing department is simply palming it off as some newfangled "ultra low power" process, when it's been on the roadmap the whole time.

        That is, if the reality about high-K comes anywhere near Intel's claims. I recall qu
    • 1000 times less by heat, leaves you with the computing half (plus a marginal fraction of the heating part which they didn't bother to count).

    • Easy, it's a binary fraction with the trailing zeros left on to show the high precision, but they left out the point. Like so:

      .1000(base 2) == .50(base 10) == 1/2

  • Other coverage (Score:3, Informative)

    by CoderJoe ( 97563 ) on Tuesday September 20, 2005 @07:06PM (#13609491)
    An article [theregister.co.uk] from The Register from this morning, also covering the new process.

  • Less leak, slower performance (Score:3, Informative)

    by whovian ( 107062 ) on Tuesday September 20, 2005 @10:22PM (#13610593)
    But the technology does have some trade offs in performance. "Intel's ultra-low power process is a significant part of Intel's strategy to reduce platform power," he said in an interview. "But the transistor performance is lower by a factor of two" compared to the company's high-performance 65-nm process.

    Source: www.eetimes.com

    Ironic for Intel, no?

  • Been doing this for a while. (Score:3, Insightful)

    by freidog ( 706941 ) on Tuesday September 20, 2005 @10:44PM (#13610701)
    The 90nm process intel is using has a very similar thing, only not done near to the extent their talking about here.

    Intel has two sets of transistors for 90nm, high voltage threshold and low voltage threshold.
    High VT are fairly power efficient as it is, about 40nA/um leakage, Ion about 31 times greater than Ioff (NMOS)
    Low VT (which were used extensivly in Prescott to get it to scale to the 4-5ghz range it was intended for), which are horribly inefficient, with a leakage of about 400nm/um, Ion around 3.5 times Ioff (NMOS)

    Seems like this is largely a really really high VT transistor, with a few tweaks to the oxide thickness for good measure.
    In any case, it should help out the ultra low power devices to an extent, but won't effect any of intel's 65nm desktop/laptop chips. (save maybe a chipset, but I doubt we'd see a 65nm chipset).

    • I want to see mixed VTs on a process. The "controller" core uses the high VTs, and additional cores use low-VTs that leak like a son-of-a-gun, but are held in S3 suspend and only used for peak processing. The key is to remove the power rails so that the low-VTs don't cost you when you aren't using them.

      I beleive Cell uses this method, and throttles them with temperature to ensure that the cooling and power supply design is never exceeded with long heavy loads.

  • Umm... So What? (Score:2, Insightful)

    by bbrack ( 842686 )
    So intel is going to build low power dsp and microcontroller type devices on a more efficient version of their current process node

    Big Deal

    Everyone does this

    It would be RETARDED to build a chip designed for a cell phone on the same process node as a chip designed for a server - you tailor your process to help your chips perform their job better, not build chips that were designed with opposite goals in mind all on the same process

    When you want ultra-high performance, you will lose some efficiency - the
    • CISC (Complex Instruction Set Chip) processor technology has been replaced with RISC (Reduced Instruction Set Chip) processors, while maintaining backward compatability with the x86 architecture. Manufacturing tolerances have improved quite a bit, with 90nm lithography being replaced with 65nm. NMOS has been Intel's chosen cell technology for more than two decades. It offered lower power per MIPS than ECL technology, which had raw speed matched only by "toaster-level" heat generation.

      With smaller die siz
  • If this tech reduces current in one transistor state, "zero" to 0.1% that of "one", from equal current, it can favor one state. Perhaps it's possible to process instructions to ensure that more possible states of the program are representable as zeroes than as ones. If the difference is large, then it could reduce X=2 power to Y=<1.

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