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Hardware

Hope for MIPS, From Toshiba 166

Posted by timothy from the chips-from-the-alternate-universe dept.
CDWert writes: "EE Times is reporting MIPS is teaming up with Toshiba, to develop their next generation 64 bit proccesor. After all the Itanium Speak and X86-64 talk going on here and the premature predictions of MIPS demise, through their inability to fund the next round I thought this would be refresing to MIPS fans." According to the article though, there will be no product until at least a year from now.
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Hope for MIPS, From Toshiba More

Hope for MIPS, From Toshiba

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  • MIPS compilers (Score:1, Interesting)

    by Anonymous Coward
    I don't know about others, but as for Microsoft, they're working on MIPS compilers.
  • What I found especially interesting was the range of devices that MIPS chips are used in. It occurred to me that very few people probably need a 2GHz P4 in their inkjet printers and mobile phones.
  • Only if we can keep measuring it in FLOPS and sounding silly when talking about it. "Yeah, this new MIPS chip runs in the tera-flops."

  • Broadcom/SiByte (Score:3, Interesting)

    by jlv ( 5619 ) on Wednesday February 20, 2002 @02:02PM (#3038990)
    It'll be interesting to see how it compares to the SiByte SB1 [sibyte.com], which a MIPS64 instruction set SOC with two cores.
    • I've been investigating this chip for embedded use and it looks like a great solution. It basically has just about everything one would need on a single chip... serial ports, Gig-E/Ethernet MACs, DDR ram controller, PCI controller, and more. It also has a Hypertransport interface where two chips can be connected back-to-back with a 12Gbps connection between them.

      Broadcom also supports Hard-Hat Linux on this chip.

      -Aaron
      • Having worked on the SB1 (which is the core) and the SB1250 (the full chip you're talking about), I have to agree. Not that I'm biased or anything.

        I'm hoping in a year or two this well be cheap enough that someone will pick it up and make a cool little embedded fanless computer with a hard drive and 2 GigE macs. It would make a really sweet little embedded linux webserver/NAT router/NFS server/whatever. All with SMP at a nice little clip! It wouldn't be as fast as a high-end PC, but it wouldn't need to be.

        With regards to this article, I don't think it's big news. MIPS is very much alive and well, and not going anywhere. It's got the second-cleanest architecture definition around (behind Alpha, IMHO), and is much easier to implement in high performance incarnations than ARM. There's a good reason no one has done a superscalar ARM...the conditional execution that's so cool in some respects makes going superscalar (and, eventually, out of order) a real pain...

  • no product for a year? MIPS is dead afterall! (Score:1, Flamebait)

    by Anonymous Coward
    According to the article though, there will be no product until at least a year from now

    Timothy, why are you such an idiot?

    They announce a new CPU and all you can say is that it won't arrive this year? no shit sherlock. These things take just a little time and effort (and money) to produce.

  • Never thought ..... (Score:3, Interesting)

    by CDWert ( 450988 ) on Wednesday February 20, 2002 @02:08PM (#3039028) Homepage
    Well I never thought Id get an article posted, submitted 7 and never one got accepted, ANYWAY as a result, I didnt complete my story, Just figuring what the hell and let the slashdot editors take it and run with it.

    One of the coolest parts, I thought it will be a 0.10 micron process, is anyone else using this small of a process yet ?

    Is there hope for SGI and MIPS or has SGI decided against it in total ?

  • Not such a big deal (Score:3, Informative)

    by Mark of THE CITY ( 97325 ) on Wednesday February 20, 2002 @02:09PM (#3039033) Journal
    Read the first two paragraphs of the story. Toshiba is taking MIPS' Amethyst core and developing an embedded controller around it, to be known as TX99. With 600MHz clock, scalable to 1GHz, this is great news for the embedded world and will position MIPS as a competitor to Motorolla for embedded h/w. But it isn't really a new chip for MIPS, just a variation on an existing one.

    Also, the purchasers of commodity embedded processors tend to be slow to change, so MIPS/Toshiba will have to make a compelling case to do so.
    • MIPS based hardware was expensive, so they sold limited quantities (relative to other CPUs). Or they other way arround which is the same (ie: they couldn't mass market it like and intel or AMD chip, so they had to charge accordingly).

      But now, they will be in embedded devices. So the chip is the same but mostly everyone will be able to take advantage of it's power for a few bucks. I don't know exactly what devices, but they can be cameras, video recorders, pims, portable mp3 player, miniPCs, smart reconfigurable routers, etc.

      Onliner: same design, but affordable for the masses (this is my guess)
      • MIPS has BEEN in embedded applications for a long
        time. I was using an IDT 3051 (R3000) core in
        an X-window terminal 10 years ago. They have
        been in laser printers, CISCO networking boxes,
        video games, X terminals and other high-end
        embedded gear for a while...

  • MIPS for LINUX (Score:2, Informative)

    by lemonhed ( 412041 )
    MIPS is a great technology.

    It will revolutionalize the embedded sector quite a bit.

    For anyone interested in learning more about MIPS and Linux (there is a port, BTW)... Check out this HOWTO link [lena.fnet.fr]

    The small footprint of MIPS chips makes Linux/MIPS suitable for many embedded systems.

  • Embedded... (Score:3, Interesting)

    by Cyclopedian ( 163375 ) on Wednesday February 20, 2002 @02:09PM (#3039038) Journal
    This is for the embedded market. Sure, that's all well and good, but somebody tell me the benefits of a 64-bit chip in an embedded device vs a 32-bit chip.

    If we're getting by pretty well on 32-bit chips, where's the market for 64-bit chips? High speed routers?
    -cyc

    • Good grief.
      Toshiba's product, dubbed the TX99, is geared for cost- and power-sensitive embedded applications, such as automotive telematics, office automation, multimedia home gateways, digital consumer products and networking, said Katsuji Fujita, vice president and executive vice president of the System LSI Division at Toshiba of Tokyo.

    • Re:Embedded... (Score:2, Insightful)

      by Winjer2k ( 515635 )
      I was wondering the same thing until I realized:

      64-bit AIBO's!!!

      But, seriously, I have a hard time seeing why my digital camera or PVR needs a 64-bit processor.

      • Re:Embedded... (Score:3, Interesting)

        by Steveftoth ( 78419 )
        maybe not a digital still camera, but definiatly a digital movie camera needs as much CPU as you can throw at it. With a larger processor, you can do more cool stuff on the fly with a camera, from the mundane ( compress harder to save space) to the strange, such as enhanceing the image on the fly ( night vision, color/brightness correction, etc.) Right now some ( if not most) cameras have these kinda of features, but with better processors it can only help to make them better. Also, if you had a CPU instead of an optimized graphics processor you could upgrade your camera.
        • maybe not a digital still camera, but definiatly a digital movie camera needs as much CPU as you can throw at it.

          It's a common (ridiculously so, apparently) misconception that 64-bit CPUs are inherently faster than 32-bit CPUs. Not so. In fact, code compiled for a 64-bit chip will be slower than the same code compiled for a 32-bit chip, because you get fewer cache lines in your caches, so you have to go back to main memory more often.

          If and when we see the day that 2 GB of addressable memory is not enough for most applications, 64-bit CPUs will be really important. Until then, they're just not that big a deal.

          • Re:Embedded... (Score:3, Informative)

            by Guy Harris ( 3803 )
            In fact, code compiled for a 64-bit chip will be slower than the same code compiled for a 32-bit chip, because you get fewer cache lines in your caches, so you have to go back to main memory more often.

            The number of cache lines you get in your caches isn't necessarily connected with whether your CPU is a 32-bit or 64-bit CPU; cache lines are typically bigger than the word size of the processor, and not necessarily governed by the word size of the processor.

            If you have 64-bit pointers or integers, your variables may take a larger fraction of a cache line, though, so that you get more cache misses and have to go back to memory more often.

            You won't necessarily have 64-bit pointers just because your CPU is a 64-bit CPU, and you won't even necessarily have most or all integers be 64-bit. Compilers for 64-bit CPUs may still generate 32-bit code - except when you're processing 64-bit integral data types, in which case it may generate 64-bit code for those data items.

            • The number of cache lines you get in your caches isn't necessarily connected with whether your CPU is a 32-bit or 64-bit CPU.

              Of course, you're right. I wrote "cache lines" when I meant to say "pointers." If your CPU uses 64-bit pointers or 64-bit ints, you get fewer pointers or ints per cache line, which means more misses.

              Sorry for the confusion. I should know better than to post and talk on the phone at the same time....
      • 64-bit AIBO's!!!

        Err, umm, I think the AIBOs have R4000's or R4400's or something such as that in them; they're 64-bit processors. This spec sheet for the AIBO ERS-220 [aibo.com] says it has a "64bit RISC processor".

      • > PVR needs a 64-bit processor.

        Some crypto algorithms go a lot faster with a 64bit processor. Of course for a PVR that might not be an advantage for the user.
        (For a cellphone, on the other hand...)
    • But that's not the important part. The important stuff is that the cost of production is the same for a 64 or 32 bits processor (research costs sunk, like in this case). So, argument is why use a larger, less powerfull chip if they can use a better, smaller chip.

      Also, legacy compatibility is less important in embedded devices than any other market i can think of (and specially consumer PCs).
    • AFAIK (but I'm not sure) Laser Jets HP 1040 use MIPS. PCL and PS probably need quite a bit of floating point power to render good graphics. Although 64-bit integer in there may look excessive, but, on the other hand some functions probably could be optimized for speedier integer operations with this extra precision.

      In this kind of products it seems nice to have all those 64 bits, even in integers. Anyway, just an idea - there are devices out there beyond routers that are part of an embedded market and may benefit from these extra bits.

  • I'm a little confused. My understanding was that the x86 processors were CISC, while the MIPS proecessors were RISC. However, IA64 was a grand departure from x86, both because the instructions were 64bit, because they were almost all predicated making branch prediction hell a thing of the past, and most importantly, unlike the x86 CISC design the IA64 would be a RISC chip. What would a 64bit MIPS chip offer that the IA64 does not? Why do we need another 64bit RISC processor?
    • I understand you confusion.

      Your question has to be one of the most confusing Ive ever read, its valid and a good question, the answer is MIPS is far more experienced in RISC architecture than Intel, and second the low cost low power consupion goal from the beggining, they will be using a 0.10 process and any competition is good competition, this processor though is intended for imbedded devices, howd you like a 1ghz risc pda ? Cant really see you squeezing an Itaninum in.

      I didnt mean to be terse about your question, It gave me a laugh I had to read it 3 times, kinda like how much wood would a woodchuk chuck if a woodchuck could chuck wood....:)
    • Well, MIPS has been 64-bit a lot longer than Intel. This isn't like announcing a new ISA, or a new microarchitecture, or really anything other than moving a chip with some ISA extensions to a smaller process for the embedded market.
    • Considering we already had Alpha and MIPS, why did we need one from Intel??

      They are all desgined from a different perspective with different goals in mind. I'm sure there are some applications where one will excel over the others.

    • You are confused, the IA64 is NOT just a RISC chip! It is a VLIW (very long instruction word) chip. Multiple instructions are packaged together. These instructions are executed at the same time, so they MUST be able to run concurrently. The compiler is in charge of making sure these instruction "packets" can indeed run in parallel, making the compilers a total bitch to write. "A car with four wheels, hell we already have cars with four wheels, why do we need another?"
    • Do a little homework. The MIPS64 architecture was designed in the early 1990's and the first implementation, the MIPS R4000, was fabbed in 1991 (I have a MIPS Magnum computer, designed to run Windows NT for MIPS, and an SGI Indy with an R4600 that are both examples of 64-bit MIPS chips released before 1994).

      It is INTEL that is the newcomer here; 64-bit RISC architectures have been around for more than a decade.

  • Finding the niche to survive (Score:3, Interesting)

    by Lurks ( 526137 ) on Wednesday February 20, 2002 @02:12PM (#3039059) Homepage
    MIPs parts scale fairly well as an architecture. You can put a low power single issue one in a smalldevice or make something a bit more grunty by using a dual issue and incorporating FP co-processors and so on. (PS2's EE has such a custom core) They're more suited to this sort of hack-and-slash bespoke CPU design for things which need workstation type levels of computational power than, say, ARM.

    ARM's stuff has gained massive ground in the mobile devices and virtually squeezed MIPS (and everyone else) out of that market entirely. The trouble is that MIPS are being squeezed on the upper end of the scale as well by some seriously grunty main CPUs which are starting to adopte the same sort of friendliness to bespoke licensing for incorporation into VLSIs. Such as IBM's PowerPC chips. By way of an example, Sony aren't going with MIPS for the PS3, they're teaming up with IBM.

    So where is left for MIPS? Sounds like they're going after SoT type applications which are in need of serious performance, niche that they are. Make something all singing, all dancing with a damn nippy core in there and you hit applications which ARM haven't got the performance for and PPC type chips don't have the power considerations and SoT/integration levels for. Good luck to them.

  • Considering the clock ranges from 600 to 1000 MHz, how low power requirements they have compared to sux86, and how nice laptops Toshiba makes (at least they used to), I hate to see this technology limited to 'embedded' devices only. Does someone seriously need a faster laptop?

  • MIPS is beauty in simplicity. (Score:5, Informative)

    by Omega ( 1602 ) on Wednesday February 20, 2002 @02:13PM (#3039068) Homepage
    To anyone who's coded in Assembly, MIPS is pure beauty.

    The entire ISA is minimized so as to accomplish most operations in the fewest clock ticks (duh -- it's RISC). But after dealing with the crappy x86 design, it is so refreshing to deal with a logical and straightforward architecture such as MIPS. No messing with ES or DS pointers, just simple, general purpose registers. And don't get me started on the "extended" register size kludge in x86 (EAX -- what the hell?). MIPS doesn't have such baggage.

    I've coded for SPARCs, I coded for Motorola's 68k and 68HC processors. But nothing beats MIPS in terms of power from simplicity.
    • Have you ever programmed in 32 bit x86 assembly? Methinks you have not, if you consider EAX baggage....
    • I've coded for SPARCs, I coded for Motorola's 68k and 68HC processors. But nothing beats MIPS in terms of power from simplicity.

      Yep, MIPS is a great ISA, although I'd argue Motorola 88k is at least as good. One of the nicest chips I've ever had the pleasure to deal with. Far, far better than the 68k, and x86 isn't even in the same league. Shame they never really caught on outside of DG machines. But then like everything else, the superior technical solutions are rarely the ones that win in the marketplace...

    • I found that assembly in PPC601 was pretty similar to MIPS. Not as clean perhaps, but we went over the design differences and reasons in a CS class and it was fascinating to see how mass-production and cost factors changed the architecture.

      I'll be glad the MIPS is still around.
    • If you are interested in MIPS you can get an assembler here [wisc.edu]. I used this assembler in my intro to computer architecture class.

    • Re:MIPS is beauty in simplicity - NOT (Score:1, Interesting)

      by Anonymous Coward
      The ISA may be nice, but as anyone that has debugged real code will attest its not meant to be human readable. The problem comes from the MIPS idea of having the next instruction execute no matter what (with the exception of a few instructions which flush the pipeline). The result is that after a branch you execute the instruction immediately after it, then you execute the instruction at the branch. Apply this repeatedly, and you'll see the problem...ugh.
      • The problem comes from the MIPS idea of having the next instruction execute no matter what

        Awww, it's not that bad. If the compiler can't schedule an extra instruction in there, it just puts a nop in, and once you get the idea of how it works it's not so hard to mentally swap the instructions. Course it did throw me for a loop when I was coming from x86 asm. "How the f*ck is it doing *that*?"

        Granted, it's a performance hack (and since I'm merely a software weenie, I'm not even sure it's useful in the age of speculative execution) but I believe a couple of other RISC architectures share this particular, uh, "feature".

    • The MIPS is certainly a very clean instruction set, but the Alpha is nicer, still.

      For one, the Alpha architecture was 64 bits to begin with, so the instruction set is a bit cleaner (for example, the shift word right arithmetic instruction on the MIPS is simply not necessary, because both 64 bit and 32 bit shifts can be handled with shift doubleword right arithmetic (Which has two variants, due to the 32-bit roots of the MIPS. The problem is that the shift amount field in the instruction encoding is only 5 bits wide, so it isn't possible to specify an amount greater than 31 bits. The solution is to have a variant which shifts the amount plus 32.)).

      The other main differences are that Alpha doesn't have HI/LO registers (i.e. no special registers at all) and doesn't have branch delay slots.

      Other than that, they're very similar.

      bye
      schani

  • What??? (Score:3, Informative)

    by GauteL ( 29207 ) on Wednesday February 20, 2002 @02:17PM (#3039087)
    Itanium will finally get a 64-bit competitor?
    </sarcasm>

    Seriously, the way some people write about the Itanium, you would think nobody had every created a 64-bits processor before.

    • Seriously, the way some people write about the Itanium, you would think nobody had every created a 64-bits processor before.

      You do have a point, Itanium is not the first 64 bit processor out there, but I think that the reason that people make a lot of noise is that Itanium is the first 64 bit processor that has a chance of capturing the majority of the PC market. Yes almost everybody has been to 64 bits a long time ago, but none of them have the sheer marketshare that Intel does.

  • Toshiba spun off ArTile Microsystems for the TX7901 mips cpu with a 128-bit internal architecture, dual-issue superscalar pipeline CPU, but it has taken years.

    http://www.artilemicro.com/html/products.html

    Don't expect to see a TX99 till at least 04 at this rate and by then it will be behind the times just like the TX79.

    .

  • Buzzwords (Score:3, Funny)

    by mrroot ( 543673 ) on Wednesday February 20, 2002 @02:25PM (#3039148)
    In addition, the MIPS Alliance Program (MAP) supports the availability of critical hardware and software such as 802.11, Bluetooth, MPEG-2, MPEG-4, audio algorithms, ATM, and others.

    Well I think they got all the buzz-word technologies. If they didn't the "and others" should cover it.

  • ARM (Score:4, Insightful)

    by OverCode@work ( 196386 ) <.overcode. .at. .gmail.com.> on Wednesday February 20, 2002 @02:26PM (#3039150) Homepage
    This is just speculation, but I think ARM is putting a lot of pressure on MIPS in the embedded market. The ARM is almost as much of a pleasure to work with as MIPS at the assembly level, and it uses very little power. This is why Intel's StrongARM version of the ARM has found its way into many PDA's and other portable devices.

    -John
    • But they are really in two different market segments. Yes, they are both embedded, but the main focus of the high-end embedded MIPS chips is performance without the high power consumption.

      ARM has excellent performance for some applications, but for many embedded systems, using an ARM is simply not an option.
    • ARM has put a ton of pressure on MIPS in the embedded market. Low power consumption is an advantage ARM definitely has over most MIPS cores. Also ARM/Thumb (a mixed 16/32 bit processor mode) gets excellent code compression effects, since you can use 16-bit instructions for code that doesn't need to run as fast. MIPS16 is MIPS's competing solution, but I'm not sure exactly how it stacks up. The real advantage ARM has is that they have some top-notch compiler developers in-house, so the ARM UK compiler is excellent. MIPS relies primarily on third party suppliers for their high-end development tools. (Disclaimer: I work for one of those third parties. We're working on making better MIPS code for embedded systems.)

      Let's not forget that a 64-bit MIPS architecture already exists in the form of the MIPS64-5k and MIPS64-20k product lines. This must be some other new 64 architecture.

      --Paul
    • Let's not forget that back in the days of Acorn Computers, StrongARM was a strange marriage between ARM and MIPS!

      It wasn't that many years ago that I was salivating over the first SA processor but not being able to afford one.
  • According to the article though, there will be no product until at least a year from now.

    So, about 5 years before Itanium actually ships, then?
  • on an earlier article, i predicted the demise of MIPS and similar architectures due to the increasingly prohibitive cost of chip design, and the increasing standardization around intel and intel clusters.

    i didn't consider partnerships, if two or more merely giant corporations share the load of development, then there can still be competition for the truly titanic.

    anyway, best of luck to them, and here's hoping there will always be a choice.

  • MIPS != new, MIPS != SGI, this != news (Score:3, Informative)

    by foobar104 ( 206452 ) on Wednesday February 20, 2002 @02:48PM (#3039275) Journal
    I love reading the comments that say things like, "MIPS will revolutionize the embedded market!" and "Maybe there's hope for SGI yet!"

    MIPS microprocessors are everywhere, and have been for years and years. They're in your TV, your cell phone, your microwave oven. They're in those cool little GPS receivers that everybody wants for Christmas. They're in the PlayStation 2, Replay TV PVRs, and most of Cisco's routers.

    Look around your office. There are probably half a dozen MIPS processors within about twenty feet of you right now.

    This is nothing new or revolutionary, and it has nothing to do with the MIPS R10K, R12K, and R14K processors that SGI uses in their computers. Everybody calm down.

    • Mod parent up. The key words in the article are "cost- and power-sensitive embedded applications". Cost I would guess would be more like single or double digits of dollars than what we think of as a CPU price. Power is a bit more arguable, as some "non-embedded" systems are starting to care somewhat about power (e.g. laptops), but still. Summary: this may be interesting, but it isn't a competitor for IA64, x86-64, sparc, alpha, etc.

  • After the recent "Intel is the only CPU roadmap" and "Sun to offer x86 Linux package," stories on Slashdot, I've been really worried about the future of non-Intel processors (at least as they relate to high-performance computing).

    Although Linux is ostensibly a competitor to Windows, it has made most of its inroads in the "big iron" market.

    Most of the non-Intel processors are in this market (HP-RISC, SPARC, MIPS)-so what we are seeing is Linux, in effect, killing these other processors. High-end production houses are leaving their SGIs for custom build x86 boxes, servers are dropping Sun and IBM for x86 offerings from Dell and Compaq.

    As Sun slowly fades into the night (no pun intended) the only non-x86 CPU with any installed base in the high-performance market anymore is the PowerPC, and its fate is closely tied to the shaky Apple, which is struggling to re-invent itself with OS X.

    God bless Toshiba! I wonder if Sony would add some R&D into that pot in preparation for the PS3, and maybe we would have another high-performance chip to compete with Intel.

  • MIPS Patents (Score:2, Informative)

    by brejc8 ( 223089 )
    A piece of news that not many people have noticed recently is that MIPS have settled with Lexra.
    Lexra is a company producing MIPS compatible chips without a MIPS licence. Lexra have been revealing holes in the MIPS patents in the ongoing court case. As Lexra have been succeeding a little too well and MIPS have simply given up and in order to stop Lexra from revealing that the MIPS 32 architecture is not patent able they have given them a MIPS32 licence.
    Unfortunately MIPS still have a couple invalid patents to press on people who try to make compatible processors.
    This is quite annoying personally as I have recently released a MIPS compatible processor (Yellow Star) and have now received letters from MIPS complaining about everything on the web page and threatening legal action even though I haven't broken their invalid patents.

    • That's standard lawyer scare tactics. There should be a law against it, but how to make such a law and not have it impede lawyers when you really need them to protect a legitimate violation, I'm not sure. Maybe assigning a cost to the threat itself, and if the threatener loses, they have to pay that as well. Of course lawyers would oppose such a law, so don't expect it to happen.

  • They use MIPS and are struggling with CPU speed compared to Intel. The current 600 Mhz core is in the new Fuel workstation. Be nice to see the 1Ghz version even nicer to get a new generation.

    R20K maybe?

    • Perhaps a port to Power/PowerPC? I know it's tough since IBM is a workstation competitor, but do they really compete? How many graphics workstation accounts have they lost to IBM I wonder, probably not too many. I guess they do compete for servers though.

      What might really be cool is if IBM acquired SGI and made them their specialized graphics workstation division. This way SGI can stop spinning cycles developing servers and focus on high powered graphics. The thought of an Onyx running on a POWER4 cpu is quite intoxicating.

      MIPS would survive on its core (fogive the pun) business of supplying embedded systems (including PS1/PS2/PSn).
  • My university teaches assembly programing using MIPS (mainly using the SPIM simulator on our department HPUX machines). I hope the company survives and prospers. I would hate to graduate with an obsolete skill. Does anyone know how common MIPS is in the CS/CoE/EE academic areas? Does the adoption of an standard in academia help it gain market share?
    • MIPS (the 32-bit version) was the precursor of almost all RISC architectures that are still extant. PowerPC, Alpha, ARM - they are all very similar in feel to MIPS. These other architectures may have small differences, but the load/store, three-address, pipelined design from MIPS is very much an integral part of them.

      I don't know how your particular university teaches architecture and assembly language programming, but I'm sure that it tries to teach concepts and methodologies which will outlive the language of instruction.

      So relax, even if (heaven forbid) MIPS ceases to be viable, its nephews and nieces will continue to live on, and your education will not suddenly stop being useful.

      (I am speaking as someone who teaches MIPS assembly language and architecture at a university, though not one renowned for its computer architecture research, at least in the past 25 years. I quiver in fear at the prospect of ever having to teach first-year students IA-64 VLIW programming.)

  • According to the article though, there will be no product until at least a year from now.


    So, if they don't improve anything, they will beat Itanium to market and outperform it.

  • As countless others have pointed out, a modified core aimed at the embedded market isn't very newsworthy (at least not to people who only care about the "computer" (PC/laptop/workstation/server) market, which Hammer and Itanium target). Brings up an interesting question though: Many architectures have started primarily targeted at the "computer" market, failed to meet expectations there, and were retargeted at the embedded market, sometimes with great success. Will an embedded processor ever make the reverse transtion, into the "computer" market?
  • I used to consider myself lucky to work with SGI machines - and up until a year or two ago, I was. SGI used to be on the cutting edge of speed, both CPU- and graphics-wise. MIPS chips are super-efficient at processing - a MIPS chip gets literally twice as much done with half the clock speed as an INTEL compatible chip. But, MIPS has become the metaphorical ball and chain tied to SGI's leg.

    We recently took an SGI Octane 2 (current SGI state-of-the-art) and an IBM Intellistation with a FireGL3 card for a test drive. The SGI Octane 2 was a 400MHz MIPS R14000 chip, and the IBM a P6 @ 1.7 GHz.

    The Intellistation is approximately a third the cost of an Octane 2. It also outperformed it by a factor of 2.5. It outperformed our older Octanes (R12000 @ 300MHz) by a factor of 3.5. Not just CPU (renderman & vmantra) but also interactive OpenGL. Same factor across the boards.

    Unless MIPS can pull a serious rabbit out of their ass, they're far, far, far behind INTEL, no matter how you slice it.

  • I was using 64-bit IRIX eight years ago. Painful the first couple of years. Since it takes MicroSoft 10-15 years to catch up to a new processor size, I don't expect to their pain soon.
  • As embedded processors become are and will be increasingly used in everything from cell phones to washing machines, the intel monopoly will begin to decline. Even presently, the TI DSPs
    http://www.ti.com

    are the market standard, and there is no reason why MIPS can't carve out a huge niche for themselves.

  • Not to be too offtopic, but a few people have been saying mips is dying. I'd disagree... the ps2 uses a Mips III clocked at 300 megahertz amoung its handful of processors. I think mips has a good thing going with sony, and should keep some money in the bank. I mean TI does the same thing with sun and they're staying afloat.
  • did SGI used to own MIPS? at least that's the impression i get when i look at the board of directors and there past (sgi, sgi, sgi, sgi... oh sorry sgi)
  • Coding in MIPS Assembler
    Written by Emmanuel Schanzer
    To the tune of: Living La Vida Loca, by Ricky Martin

    Her code is so efficient
    Her programs never crawl
    She's on a debugging mission
    That girl's code is off the wall
    (guitar solo)
    This is her occupation:
    Make code run fast and light
    She brings a strange affliction:
    Coding into the night!
    She'll make you code, then re-fine.
    Mem'ry dancing brings you pain
    She'll change reg-ister 29
    Her tricks are so insane!
    Like crack-rock in the brain!

    Shift right then shift back
    She's coding in MIPS assembler
    She'll push and pop the stack
    She's coding in MIPS assembler
    She'll branch if greater than
    Increment the program counter
    Load im-med-i-ate
    She's coding in MIPS assembler
    Coding in MIPS assembler

    Woke up and went to my class
    smelling funky and like hell.
    Debugged till 6am, its not funny
    She's like a process that you can't kill.

    She don't believe in easy
    Never comments any code
    And when you trace a register
    Can't tell from where it loads
    Not enough addressing modes!

    Shift right then shift back
    She's coding in MIPS assembler
    She'll push and pop the stack
    She's coding in MIPS assembler
    She'll branch if greater than
    Increment the program counter
    Load im-med-i-ate
    She's coding in MIPS assembler
    Coding in MIPS assembler
    (guitar solo)
    But you will learn to love her:
    Take abuse and not complain.
    Store registers defensively,
    Debugging code for fame,
    All high-level stuff is lame!

    Shift right then shift back
    She's coding in MIPS assembler
    She'll push and pop the stack
    She's coding in MIPS assembler
    She'll branch if greater than
    Increment the program counter
    Load im-med-i-ate
    She's coding in MIPS assembler
    Coding in MIPS assembler
    Coding in MIPS assembler

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