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IBM Creates Working "Racetrack Memory"

Posted by kdawson on Fri Apr 11, 2008 09:42 AM
from the and-they're-off dept.
holy_calamity writes "IBM has created the first working 'racetrack memory' device — a technology we've discussed as it's been touted as the future of memory. It works by writing bits using the magnetic domains inside a very thin wire. Those domain can be shunted along this 'racetrack' and past read heads."
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[+] 'Racetrack' Memory Could Replace Hard Drives? 149 comments
Galactic_grub writes "An experimental new type of memory that uses nanosecond pulses of electric current to push magnetic regions along a wire could dramatically boost the capacity, speed and reliability of storage devices. Magnetic domains are moved along a wire by pulses of polarized current, and their location is read by fixed sensors arranged along the wire. Previous experiments have been disappointing, but now researchers have found that super-fast pulses of electricity prevent the domains from being obstructed by imperfections in the crystal."
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  • Sounds like... (Score:5, Interesting)

    by Gordonjcp (186804) on Friday April 11 2008, @09:43AM (#23035540) Homepage
    ... bubble memory. Welcome to 1968.
      • Re:Sounds like... (Score:5, Informative)

        by hey! (33014) on Friday April 11 2008, @11:06AM (#23036636) Homepage Journal
        Ah, you beat me to it. The mercury delay lines were readily available because they had been developed for radar systems in WW2.

        CRT based memory was also, in a sense, a product of radar. If you've seen early radar depictions from old movies, you had this kind of linear cursor started at the center of a round CRT tube and went to the edge. The end swept around the perimeter of the display, and when a line crossed a "blip", it would be refreshed. Over the next couple of seconds the blip would fade and the sweeping line would refresh the blip in a slightly different place. The persistence of phosphors on the screen were a kind of short term memory, so it's not surprising that engineers familiar with radar hit on the idea of making CRT storage units.

        Random access is not the only memory model ever used in computers, nor is it the only one that will ever be used in the future. This is one of the reasons CS students are taught to regard polynomial time differences between classes of algorithms as relatively unimportant in a theoretical sense, although they are obviously important in a practical sense.
  • Bubble memory (Score:3, Insightful)

    by threaded (89367) on Friday April 11 2008, @09:47AM (#23035588) Homepage
    I can't be the first one to read this and think, eh, isn't this just bubble memory?
      • Re: (Score:3, Interesting)

        Original HP pocket calculators used bubble memory. Yes, I am that old...
      • Re: (Score:3, Interesting)

        Well, it worked, alright. But it took forever for the information to get around the loop, leading to large seek times, and they couldn't push it over a mbit a chip. I'm thinking they used actual wire while IBM is probably lithographically defining it like a CPU transistor. And yes, they used it. If you look closely at any CNC machine shop that's been around for a while, you'll probably find one or two machines from the era with bubble memory, still whirring away. CNC machines, for many many years, had to k
  • If you had an infinite-length track, you could theoretically encode data which could itself be interpreted as processor instructions. Then, given these instructions, you could move back and forth within this track and read data and further instructions. With a fairly minimum number of instructions, it would be possible to synthesize more complex instruction batches.

    This sounds like such a great idea. I wish I had it already!
  • So, this is basically a solid-state version of mercury delay lines?
  • FTFA (Score:4, Funny)

    by Oxy the moron (770724) on Friday April 11 2008, @09:53AM (#23035660)

    The first ever racetrack memory device is able to store and read three bits of data using the racetrack method.

    Bit 1 - Did something?
    Bit 2 - ??????
    Bit 3 - Profited?

  • by Cryophallion (1129715) on Friday April 11 2008, @10:05AM (#23035806)

    Without a proper Light -Distance analogy [slashdot.org] I have no way of being impressed by the speed of device. Is it knuckle to knee? Nose to toe? People need to know these things!

  • Older than Dirt! (Score:3, Insightful)

    by Number6.2 (71553) * on Friday April 11 2008, @10:09AM (#23035860) Homepage Journal
    http://en.wikipedia.org/wiki/Delay_line_memory
  • by jockeys (753885) on Friday April 11 2008, @10:22AM (#23036020) Journal
    but hasn't this been done in the past with electrical pulses sent down a very long wire? In a loop? So long ago that registers were called accumulators?

    I remember my OpSys prof showing us one of these things that was new and shiny when HE was in school. Basically just a long (couple km, I think) wire wrapped up in a small coil the size of a shoebox that acted as RAM by sending pulses around the loop, reading them and then sending them again... the delay of electrons traveling the loop acted as extra space, until you were sending pulses continuously. Sort of like a circular stack.

    Anyone else see some similarities here?
  • by Jupiter Jones (584946) on Friday April 11 2008, @10:27AM (#23036078)
    Meh.

    Wake me when they come up with "Hot Dog" or "Crashdown" memory.

    JJ
  • For primary storage (Score:3, Interesting)

    by foniksonik (573572) on Friday April 11 2008, @10:39AM (#23036264) Homepage Journal
    The interesting thing is that they feel it is capable of being primary storage...so we're talking Terabytes...

    Could be interesting.
  • Compared to PMC? (Score:3, Interesting)

    by babymac (312364) <pheed@ma[ ]om ['c.c' in gap]> on Friday April 11 2008, @10:50AM (#23036420) Homepage
    Does anyone have any idea how this compares to programmable metallization cell [wikipedia.org] technology which made the news recently? How close to production is PMC vs racetrack memory?
  • Timeline (Score:3, Funny)

    by audubon (577473) on Friday April 11 2008, @11:51AM (#23037194)

    The first ever racetrack memory device is able to store and read three bits of data using the racetrack method.
    Assuming memory capacity doubles [wikipedia.org] every two years, IBM expects to have a 64 kilobyte version ready by mid 2025.
  • by UnknowingFool (672806) on Friday April 11 2008, @12:01PM (#23037346)
    on the racetrack memory results. "Come on, NAND gate#7. Lucky #7! Daddy needs a new iPod"
    • Why would it need new motherboards? Its just the internal method of data storage and retrieval. Its entirely possible that early versions of this drive could use SATA connections and just be cheaper and faster than current drives (rather than extraordinarily faster, if it needs a different kind of motherboard connection).
    • by pipatron (966506) <pipatron@gmail.com> on Friday April 11 2008, @10:11AM (#23035890) Homepage

      Oh! New motherboards would have to be introduced! That could take some time to switch to indeed, because it's quite rare that such a thing happens.

      Except for the switch from DRAM to SDRAM. And the switch from SDRAM to DDR, and from DDR to DDR2, and from DDR2 to DDR3, and from AGP to PCI-e, and from IDE to SATA, and.. and.. ad infinitum.