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IBM Creates Working "Racetrack Memory"
Posted by
kdawson
on Fri Apr 11, 2008 09:42 AM
from the and-they're-off dept.
from the and-they're-off dept.
holy_calamity writes "IBM has created the first working 'racetrack memory' device — a technology we've discussed as it's been touted as the future of memory. It works by writing bits using the magnetic domains inside a very thin wire. Those domain can be shunted along this 'racetrack' and past read heads."
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Galactic_grub writes "An experimental new type of memory that uses nanosecond pulses of electric current to push magnetic regions along a wire could dramatically boost the capacity, speed and reliability of storage devices. Magnetic domains are moved along a wire by pulses of polarized current, and their location is read by fixed sensors arranged along the wire. Previous experiments have been disappointing, but now researchers have found that super-fast pulses of electricity prevent the domains from being obstructed by imperfections in the crystal."
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Sounds like... (Score:5, Interesting)
Re:Sounds like... (Score:5, Informative)
CRT based memory was also, in a sense, a product of radar. If you've seen early radar depictions from old movies, you had this kind of linear cursor started at the center of a round CRT tube and went to the edge. The end swept around the perimeter of the display, and when a line crossed a "blip", it would be refreshed. Over the next couple of seconds the blip would fade and the sweeping line would refresh the blip in a slightly different place. The persistence of phosphors on the screen were a kind of short term memory, so it's not surprising that engineers familiar with radar hit on the idea of making CRT storage units.
Random access is not the only memory model ever used in computers, nor is it the only one that will ever be used in the future. This is one of the reasons CS students are taught to regard polynomial time differences between classes of algorithms as relatively unimportant in a theoretical sense, although they are obviously important in a practical sense.
Parent
Re: (Score:3, Informative)
http://research.swtch.com/2008/04/computing-history-at-bell-labs.html [swtch.com]
Bubble memory (Score:3, Insightful)
Re: (Score:3, Interesting)
Re: (Score:3, Interesting)
Imagine an infinite-length wire "track" (Score:5, Funny)
This sounds like such a great idea. I wish I had it already!
Re: (Score:2, Funny)
Turing Machine! (Score:2, Offtopic)
Re:Turing Machine! (Score:5, Interesting)
Lego Difference Engine [woz.org]
Parent
Re: (Score:3, Interesting)
For that matter, modern random access memory is really more of an abstraction than a reality.
Re:Imagine an infinite-length wire "track" (Score:4, Funny)
Cue groans...
Parent
The old is new again (Score:2, Offtopic)
Re: (Score:2)
FTFA (Score:4, Funny)
Bit 1 - Did something?
Bit 2 - ??????
Bit 3 - Profited?
Need an analogy (Score:5, Funny)
Without a proper Light -Distance analogy [slashdot.org] I have no way of being impressed by the speed of device. Is it knuckle to knee? Nose to toe? People need to know these things!
Older than Dirt! (Score:3, Insightful)
Correct me if I'm wrong, (Score:4, Interesting)
I remember my OpSys prof showing us one of these things that was new and shiny when HE was in school. Basically just a long (couple km, I think) wire wrapped up in a small coil the size of a shoebox that acted as RAM by sending pulses around the loop, reading them and then sending them again... the delay of electrons traveling the loop acted as extra space, until you were sending pulses continuously. Sort of like a circular stack.
Anyone else see some similarities here?
That's nothin' (Score:5, Funny)
Wake me when they come up with "Hot Dog" or "Crashdown" memory.
JJ
For primary storage (Score:3, Interesting)
Could be interesting.
Compared to PMC? (Score:3, Interesting)
Timeline (Score:3, Funny)
No betting (Score:5, Funny)
Re: (Score:2)
Re:this won't take off soon (Score:5, Insightful)
Oh! New motherboards would have to be introduced! That could take some time to switch to indeed, because it's quite rare that such a thing happens.
Except for the switch from DRAM to SDRAM. And the switch from SDRAM to DDR, and from DDR to DDR2, and from DDR2 to DDR3, and from AGP to PCI-e, and from IDE to SATA, and.. and.. ad infinitum.
Parent