IBM Creates Working "Racetrack Memory"

holy_calamity writes "IBM has created the first working 'racetrack memory' device — a technology we've discussed as it's been touted as the future of memory. It works by writing bits using the magnetic domains inside a very thin wire. Those domain can be shunted along this 'racetrack' and past read heads."

Sounds like...

... bubble memory. Welcome to 1968.

Re:Sounds like...

Ah, you beat me to it. The mercury delay lines were readily available because they had been developed for radar systems in WW2.

CRT based memory was also, in a sense, a product of radar. If you've seen early radar depictions from old movies, you had this kind of linear cursor started at the center of a round CRT tube and went to the edge. The end swept around the perimeter of the display, and when a line crossed a "blip", it would be refreshed. Over the next couple of seconds the blip would fade and the sweeping line would refresh the blip in a slightly different place. The persistence of phosphors on the screen were a kind of short term memory, so it's not surprising that engineers familiar with radar hit on the idea of making CRT storage units.

Random access is not the only memory model ever used in computers, nor is it the only one that will ever be used in the future. This is one of the reasons CS students are taught to regard polynomial time differences between classes of algorithms as relatively unimportant in a theoretical sense, although they are obviously important in a practical sense.

Re:

Packard Bell did machines with mercury delays & CRT storage in the 1960s

http://research.swtch.com/2008/04/computing-history-at-bell-labs.html [swtch.com]

Bubble memory

I can't be the first one to read this and think, eh, isn't this just bubble memory?

Re:

Original HP pocket calculators used bubble memory. Yes, I am that old...

Re:

Well, it worked, alright. But it took forever for the information to get around the loop, leading to large seek times, and they couldn't push it over a mbit a chip. I'm thinking they used actual wire while IBM is probably lithographically defining it like

Imagine an infinite-length wire "track"

If you had an infinite-length track, you could theoretically encode data which could itself be interpreted as processor instructions. Then, given these instructions, you could move back and forth within this track and read data and further instructions. With a fairly minimum number of instructions, it would be possible to synthesize more complex instruction batches.

This sounds like such a great idea. I wish I had it already!

Re:

If I had an infinite length track, I'd sell it for infinite money.

Turing Machine!

Turing Machine! [wikipedia.org]

Re:Turing Machine!

Lego Turing Machine [umontreal.ca]

Lego Difference Engine [woz.org] :D

Re:

Well, as a practical matter you probably wouldn't make linear memory with a single read head that was billions of bits long. Nor would you be likely to treat it as such in your programs, although you might have clever adjustments to your algorithms that t

Re:Imagine an infinite-length wire "track"

Hmm... To use a car analogy (this is Slashdot, right?): if you had a car on an infinite-length track, would it be the ultimate Touring Machine?

Cue groans...

The old is new again

So, this is basically a solid-state version of mercury delay lines?

Re:

Or plated wire memory.

FTFA

The first ever racetrack memory device is able to store and read three bits of data using the racetrack method.

Bit 1 - Did something?
Bit 2 - ??????
Bit 3 - Profited?

Need an analogy

Without a proper Light -Distance analogy [slashdot.org] I have no way of being impressed by the speed of device. Is it knuckle to knee? Nose to toe? People need to know these things!

Older than Dirt!

http://en.wikipedia.org/wiki/Delay_line_memory

Correct me if I'm wrong,

but hasn't this been done in the past with electrical pulses sent down a very long wire? In a loop? So long ago that registers were called accumulators?

I remember my OpSys prof showing us one of these things that was new and shiny when HE was in school. Basically just a long (couple km, I think) wire wrapped up in a small coil the size of a shoebox that acted as RAM by sending pulses around the loop, reading them and then sending them again... the delay of electrons traveling the loop acted as extra space, until you were sending pulses continuously. Sort of like a circular stack.

Anyone else see some similarities here?

That's nothin'

Meh.

Wake me when they come up with "Hot Dog" or "Crashdown" memory.

JJ

For primary storage

The interesting thing is that they feel it is capable of being primary storage...so we're talking Terabytes...

Could be interesting.

Compared to PMC?

Does anyone have any idea how this compares to programmable metallization cell [wikipedia.org] technology which made the news recently? How close to production is PMC vs racetrack memory?

Timeline

The first ever racetrack memory device is able to store and read three bits of data using the racetrack method.

Assuming memory capacity doubles [wikipedia.org] every two years, IBM expects to have a 64 kilobyte version ready by mid 2025.

No betting

on the racetrack memory results. "Come on, NAND gate#7. Lucky #7! Daddy needs a new iPod"

Re:

Why would it need new motherboards? Its just the internal method of data storage and retrieval. Its entirely possible that early versions of this drive could use SATA connections and just be cheaper and faster than current drives (rather than extraordinari

Re:this won't take off soon

Oh! New motherboards would have to be introduced! That could take some time to switch to indeed, because it's quite rare that such a thing happens.

Except for the switch from DRAM to SDRAM. And the switch from SDRAM to DDR, and from DDR to DDR2, and from DDR2 to DDR3, and from AGP to PCI-e, and from IDE to SATA, and.. and.. ad infinitum.