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Low Voltage Is Key To Energy-Efficient Chip
Posted by
kdawson
on Tue Feb 05, 2008 06:15 PM
from the breaking-the-barrier dept.
from the breaking-the-barrier dept.
An anonymous reader writes in with news from the International Solid State Circuits Conference in San Francisco of a new energy-efficient chip designed by researchers at MIT. It's said to be able to run on 1/10 the power of current chips. Texas Instruments worked with MIT on the design, which is maybe five years from production. "The key to the chip's improved energy efficiency lies in making it work at a reduced voltage level, according to... a member of the chip design project team. Most of the mobile processors today operate at about 1 volt. The requirement for MIT's new design, however, drops to 0.3 volts."
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All well and good (Score:5, Funny)
Re:All well and good (Score:4, Informative)
Parent
Re:All well and good (Score:4, Informative)
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Your current multigigahertz processor relies on dynamic logic. Dynamic logic does not work at subthreshold (roughly below 1V). This chip almost certainly uses static logic and will not be as fast as a modern CPU no matter what the voltage. It is probably designed to be tied to low speed sensors where the chip never needs to run faster than the sensor can produce data, which may mean an upper limit of 1MHz (and the i
Re:All well and good (Score:4, Informative)
Gigahertz speeds are not impossible for static logic, in fact most modern processors are in their vast majority (and perhaps entirety, though I couldn't prove it) static logic, and perform quite a bit of logic in a single clock using static circuits. 45nm transistors are really fast, they don't necessarily need the tricks (and design complexity, and manufacturing risk) of dynamic logic to get to high speeds. Maybe the double-clocked ALUs in the Intel P4 series used it for example, but otherwise static logic rules the day.
Certainly you're right that it's unlikely that this chip would clock that high regardless of voltage. Static logic likes super-threshold voltages too.
Parent
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I also think these small super low power chips are far and away more interesting, and more important to our future lifestyles, than speed demon behemoths.
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True enough, there's certainly a different degree of "like" between dynamic and static in that respect.
I admit I am an analog person and my digital design classes were a long time ago (in internet years). Sorry if my information is out of date.
Well a long time ago in Internet years might put that right around the time of the Alpha? It was one chip that I know made heavy use of dynamic logic in order to reach such high frequencies before ot
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Architecture is far more important (Score:3, Insightful)
That's why your cell phone has an ARM CPU and not an x86.
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Re:Architecture is far more important (Score:5, Informative)
Maybe a more signficant factor in determining the power consumption of a CPU is the technology process choice.
Intel typically tune their process for performance, at the expense of leakage. This lets them squeeze out a couple of GHz in terms of clock speed, but it means that the power consumed when the chip is doing nothing at all (i.e. idling) is much larger. The CPUs that are put into cell phones (from companies like ST, TI, Broadcom, etc, etc) are normally fabbed with a "low power" or LP option. This reduces the maximum speed that you can get out of the processor, but reduces the leakage problem significantly. If the cell phone is only using the processor 1% of the time (think of how long it spends powered on in your pocket), then there is no point in having the best 3D games on your phone, if the stand-by time is 15 minutes.
Switching between these standard (or GP) processes and LP processes is not quiet straight forward, as you need to design all your mixed-signal / analog blocks (think PLLs, bandgaps, regulators, etc) for both nodes. While I'm sure Intel could probably afford to do this, they would then have to turn around and support this process in their fabs, which would eat up their resources for their processor market.
If you compare the numbers: Intel can sell their processors for hundreds of dollars. Phone manufacturers buy processors from the other Semicos at about 10-15 dollars each. Guess where the better margin is
Parent
You need to pervceive the right things... (Score:3, Insightful)
in other news, high MPG key to better gas mileage (Score:5, Funny)
Perhaps John Madden Is Submitting Stories? (Score:5, Funny)
Parent
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So if I leave Chicago heading eastbound at 9 PM and drive 5 miles at 7000 rpm in my convertible... and you leave NY at 10:30 PM and drive westound for 50 miles at 2000 rpms in your Canyonero... who has used less energy? But importantly, who was more energy efficient*?
And most importantly, and what time does train A jump the tracks and decapitate me for bringing a car analogy to a football analogy fight?
*[hint] it
Re:in other news, high MPG key to better gas milea (Score:2)
To reduce power consumption, you either have to reduce the voltage or the current.
If you shuffle your feet across the carpet, you'll generate static electricity at thousands of volts. The reason that this doesn't kill you is that the currents are absolutely tiny, making the power transmitted between your socks and the carpet also extremely small, and non-hazardous.
These guys are claiming that we can most effectively reduce power consumption by focusing on reducing the voltage requi
Re:in other news, high MPG key to better gas milea (Score:4, Informative)
To reduce power consumption, you either have to reduce the voltage or the current.
While your formula is right, it's not too applicable for chip power usage because current is not a constant. The formula you will normally see is
P = P-switching + P-leakage
Now, P-switching = fCV^2, so you can reduce it by reducing the clock frequency, voltage, or the number of transistors. But, P-leakage actually increases exponentially as the gate threshold voltage is reduced -- so, reducing the voltage too much will not help, either. There's only so far you can go before leakage power becomes the dominant one and reducing voltage further doesn't help.
Parent
How can that work? (Score:2)
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The activation voltage of a transistor is variable- it's a property of the materials its made of.
Re:How can that work? (Score:4, Informative)
Dear God, how did this get modded Informative? The parent is confusing CMOS logic with NMOS logic (you do NOT use static loads with CMOS logic), and FETs do not have a parameter called "activation voltage".
For a description of CMOS logic that's actually accurate, check out the wikipedia article here:
http://en.wikipedia.org/wiki/Cmos [wikipedia.org]Parent
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It's also a property of the doping levels of the silicon. Basically, you need to bring a certain amount of charge under the channel to turn the device on. This depends on the substrate material, but also depends on how much charge is available (i.e. doping).
In a given process, you can different flavors of transistors, each with it
Not bipolar logic (Score:2)
Re:How can that work? (Score:4, Informative)
Parent
Re:How can that work? (Score:5, Informative)
Instead of the typical "open/closed water pipe valve" model of the transistor, imagine having a leaky bucket, and then determining 1 vs 0 on how many drops get through.
It's a tough area to design circuits in because of the very delicate balance. It doesn't take many electrons (or much process variation) to bust up your circuit.
Parent
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Pretty much everyone who uses them for fun
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You need to buy them in bulk. For example, Intel will sell you about 500 million FETs for only $200.
Will reduced voltage affect heat output? (Score:2)
P = U*I (Score:2)
(Yes, I'm well aware that's only ohmic power, so shoot me.)
Always on (Score:2)
I'm waiting for several years now for a system that is completely silent, uses very low power and does not heat my room. And can be used and accessed all the time. And of course, one that does not make the performance penalties that VIA makes in their current EPIA offerengs (otherwise I would be there).
Fortunately this seem to be going to happen in the very near future. Chipsets and CPU's are partially powering down where ever possible, and with a flash SSD's there is no spin-up or (loud) rattling whe
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Wow! (Score:4, Funny)
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Process Counts (Score:3, Interesting)
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This has already been done before (Score:2, Interesting)
Power consumption (Score:5, Informative)
Pavg = N*f*C*Vdd^2 + Pleak
where N is the probability of a gate switching during one clock cycle, f is the clock frequency, C is the average gate capacitance, Vdd is the supply voltage, and Pleak is the power loss due to current leakage. Since power is proportional to the square of the voltage but directly proportional to everything else, reducing the voltage has a much greater impact on total power consumption. Going from 1V to 0.3V implies a >10x dynamic power reduction.
P = V^2/R (Score:2)
This is more interesting than TFA makes it sound (Score:5, Informative)
One cool thing about this is that the leakage power will be negligible. Leakage currents are generally exponential with respect to voltage.
Another cool thing is that the chip can actually operate at the low voltage. It's not too hard to make a chip retain state at very low voltages, but as soon as you want to do anything you usually have to raise the voltage back up before execution resumes. Any task that requires a small amount of work frequently will benefit from something like this. A contrived example of where this make a big difference is in a poorly-architected MP3 player in which the CPU has to shuffle a few thousand bytes per second to a sound chip, but in very small chunks (this poorly-architected sound chip has a very tiny buffer), hundreds of times per second. A normal chip would be constantly jumping to a high voltage and going back to sleep; depending on how long the voltage transition takes, it might have to stay in a higher voltage state constantly. This chip, on the other hand, could operate continuously at the "sleeping" voltage.
The catch is that transistors operating in the subthreshold regime are going to be pretty slow, so for any tasks that require high performance you'll have to bump the voltage back to a more normal range.
Re:This is more interesting than TFA makes it soun (Score:2, Informative)
almost like silverthorne... (Score:2)
The article states it goes down to 0.3V at idle - so it doesn't actually _run_ at that voltage (just preserve register contents). Compare this to Silverthorne which has a C6 Deep Power Down State - coincidentally at 0.3V... The article also states that this cpu uses 8-bit sram cells instead of the usual 6-bit sram cells - Silverthorne also uses 8-bit sram cells for its caches.
Granted maybe this design works a
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Re:Physics (Score:5, Insightful)
Of course I just knew some jackass was going to use this fact to try to downplay the achievement. Okay, yeah, every computer engineer knows that to reduce power by four you drop the voltage by half, but the trick is actually making this work. That's why not every chip runs on 1E-20 Volts, Mr. Anonymous Idiot.
Parent
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At subthreshold, power draw from leakage current begins to become more important than transient switching power and the V^2 factor no longer dominates. Then further dropping the voltage increases the energy used to accomplish tasks.
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