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AMD Releases Image of Phenom/Barcelona Die

Posted by Zonk on Sat Jun 02, 2007 04:02 AM
from the can't-get-much-dorkier-than-that dept.
AMD Hardware
MojoKid writes "A few weeks ago, AMD released information on new branding for their desktop derivatives of the Barcelona core, now dubbed the Phenom FX, X4 and X2. If you're unfamiliar with Phenom, the processors will be based on AMD's K10 architecture. They've been tight lipped about specifics, but we know that it will feature a faster on-die memory controller, support 64-bit and 128-bit SSE operations, and they'll be outfitted with 2MB of on-chip L2 cache (512KB dedicated per core) in addition to 2MB of shared L3 cache. This week, instead of revealing some more of the juicy details regarding those enhancements, AMD just sent over a tasty photo of a Phenom die. At least it's something."
+ -
story

Related Stories

[+] AMD's Barcelona to Outpace Intel by 50% 199 comments
Gr8Apes writes "AMD is upping the performance numbers for Barcelona by stating that "Barcelona will have a 50% advantage over Clovertown in floating point applications and 20% in integer performance 'over the competition's highest-performing quad-core processor at the same frequency'". AMD also claims that the new 3.0 GHz Opterons beat comparable Intel Xeon 5100 series processors in three server-specific benchmarks (SPECint_rate_2006, SPECint_rate2006, SPECompM2001) by up to 24%."
[+] Inside AMD's Phenom Architecture 191 comments
An anonymous reader writes "InformationWeek has uncovered some documentation which provides some details amid today's hype for AMD's announcement of its upcoming Phenom quad-core (previously code-named Agena). AMD's 10h architecture will be used in both the desktop Phenom and the Barcelona (Opteron) quads. The architecture supports wider floating-point units, can fully retire three long instructions per cycle, and has virtual machine optimizations. While the design is solid, Intel will still be first to market with 45nm quads (the first AMD's will be 65nm). Do you think this architecture will help AMD regain the lead in its multicore battle with Intel?"
[+] AMD Phenom and John Woo's Stranglehold In Action 80 comments
MojoKid writes "AMD hosted a small gathering in the Penthouse at the SoHo Grand Hotel in New York City yesterday to demo some products due to be released in the coming months. HotHardware attended the event and snapped some photos of the various demo stations. The shots and info regarding the AMD quad-core Phenom-powered system running John Woo's Stranglehold (Unreal 3.0 engine) will be of interest, as will the slick notebooks, HTPCs, and hand-held devices, like the HTC Advantage 7501. It's essentially a cross between a UMPC, Phone, PDA, and portable GPS. The device features and AMD Imageon processor, 8GB of flash memory, a 5" touch screen, and a built in magnetic QWERTY keyboard, GPS navigator and 3MP camera."
[+] 3.0GHz Phenom and 3-Way CrossFire Spotted 103 comments
MojoKid writes "AMD revealed the clock speed of the Agena-based processor they showed to the press today yesterday in conference, and clocks in at 3.0GHz. There has been a lot of speculation that AMD wasn't able to push early Phenom samples to frequencies this high, but here is proof that at least some Phenoms clocked at 3.0GHz do exist. You may also notice that the system hit a Windows Experience index score of 5.9, which is the highest score possible. It should be noted that AMD talked about 4-way CrossFire as well (a 3-way CrossFire is shown online), and that the company has continued plans to produce discreet GPUs at all performance levels (mainstream — enthusiast), even after Fusion arrives."
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AMD Releases Image of Phenom/Barcelona Die 50 Comments More /

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  • wow a photo (Score:5, Insightful)

    by jonathan DS (1110515) on Saturday June 02 2007, @04:14AM (#19361813)
    can you see how fast it is? How about some specs we understand?

    • Re:wow a photo (Score:5, Funny)

      by farkus888 (1103903) on Saturday June 02 2007, @04:18AM (#19361829)
      well marketing now tells us the number of cores is the only important factor in performance. this has 4, most desktop pc processors are 2 right now, that makes it exactly twice as fast as current processors.

      • sed " s/number of GHz/number of cores/ " marketing.txt

        • Re: (Score:2, Funny)

          by pakar (813627)
          So soon we will have 10^9 cores..

          Don't even wanna think about the overhead for checking locks :)

      • Re:wow a photo (Score:4, Interesting)

        by Jacer (574383) on Saturday June 02 2007, @06:46AM (#19362235) Homepage
        I understand your cynicism. Especially considering how a lot of processor intensive applications that most consumers use (games and other multimedia, and to a small margin running outlook, internet explorer, and MSN messenger together) get absolutely no benefit from SMP. However, as multi-core chips are rapidly becoming the defacto must have for everyone, I think developers are going to start coding to take advantage of this. We've already heard plenty of rumors about offloading most/all of the physics processing onto a chip that does it's computations in matrices rather than in any sort of linear fashion, streamlining the process both in method of computation and by freeing up your cpu cycles any number of other tasks (potentially an increase in game artificial intelligence, so it behaves less predictably, maybe do away with all of the nested tree structures and boolean choices) The only potential problem is increasing the complexity of development. Applications to take full advantage of all the new widgets will also take exceedingly more development time, support time, QA time, ect which will (alm0st) inevitably lead to a rise for consumers.

        • Especially considering how a lot of processor intensive applications that most consumers use (games and other multimedia, and to a small margin running outlook, internet explorer, and MSN messenger together) get absolutely no benefit from SMP.

          Don't underestimate how well supported SMP is already. It's true that there aren't that many single applications that get a linear speedup to 4 cores, but dual core processors have been common for a while now. All of the new games support multiple cores - they have to

      • They also told us that it has a fast memory controller and large I/O words. Those matter too.

    • Re:wow a photo (Score:4, Funny)

      by luder (923306) * <slashdot@COWlbras.net minus herbivore> on Saturday June 02 2007, @05:10AM (#19361967)
      Well, if I understood correctly, it still has overheating issues, as they're only capable of delivering a photo of a dead processor. Also, on a side note, isn't it funny that there's a website specially dedicated to hot hardware?

    • Re: (Score:3, Insightful)

      by ceeam (39911)
      Frankly - who cares? It will be fast enough, no doubt. Speed is not the #1 characteristic of CPU anymore.
    • can't fap to specs (well you can, but it's not very fun)
    • These multi-core CPUs are a great direction for the industry. The real question is, when is the 10 CPU processor coming out?

      I think this will be a great option for people who get in early at the office. The original Pentium is able to cook an egg on top of the CPU. With 4 cores comes complete breakfast for one person: 2 eggs and 2 toast. I suppose the real key is a workgroup CPU with 10 cores would be useful each is used to cook in total 4 eggs, 4 toast and 2 cups of coffee (you do have to feed your co-work
    • ... item ever, after the big reset button which was posted this very day aswell.

      Maybe it's time to shut down Slashdot?

  • Hype it up (Score:5, Insightful)

    by jhfry (829244) on Saturday June 02 2007, @04:24AM (#19361849)
    I know that this is just a ploy to build up hype for the new processors... I just hope that the processor performs up to expectations.

    AMD really needs to respond to the Core 2 Duo's with something that tells the world that they are still in the race. I really don't want to see Intel become the unchallenged winner of the silicon wars... it would hurt us users in the long run.

    I fear that it is a real possibility however. The cost of fabs, R&D, and marketing have grown so much in the last few years that it would be VERY difficult for any newcomer to compete with Intel unless they managed to develop a completely different and low cost way to manufacture their chips... or they are very heavily backed.
    • "I fear that it is a real possibility however. The cost of fabs, R&D, and marketing have grown so much in the last few years that it would be VERY difficult for any newcomer to compete with Intel unless they managed to develop a completely different and low cost way to manufacture their chips... or they are very heavily backed."

      AMD is not a newcomer. And the speed "crown" has passed between AMD and Intel a couple of times since the K6 and probably will again.

      Maybe I'm missing something, but it appears t

      • Re:Hype it up (Score:5, Informative)

        by ChrisMaple (607946) on Saturday June 02 2007, @02:17PM (#19365021)
        The only reason that AMD is still alive is that Intel made a series of blunders. Intel went exclusively with the expensive RAMBUS technology, kept the northbridge off-chip, chose clock speed over processing power. During the same period AMD integrated the memory controller, developed hypertransport, and emphasized processing power over clock speed. As a result, for several years AMD maintained a small performance advantage and slowly gained market share. Because Intel maintains a superior process technology, AMD's advantage was only a small one. Intel is much larger and can afford the huge expenses invloved in keeping the process advantage.

        Now that Intel is mostly past its blunders, it still has the advantage of superior process and is likely to maintain that advantage. Unless AMD can pull more rabbits out of its hat, its goose is cooked. I want AMD to regain the performance lead, but I don't think it's going to happen.

      • Re: (Score:2, Offtopic)

        by kestasjk (933987)
        I think the Nintendo Wii will do better than the 360 and PS2, even though the specs are lower. Microsoft and Sony were both reaching for performance but they forgot all about the fun!
        • Not everybody in slashdot knows how silicon industry works.
          Some of us actually welcome people like the grandparent who puts the news into perspective.
          Although for someone it may be obvious information, for other people it's not.

          Orly :P Let's recap what he said in short: ..:: Chapter 1: Obvious statements ::..

          The image is part of a press release.
          Since AMD currently has worse chips, what AMD needs to do is have better chips.
          If AMD dies, Intel becomes a monopolist. Monopoly is bad.
          It's very expensive to start

      • Re: (Score:3, Insightful)

        by tomstdenis (446163)
        Where is it $266? The Q6600 at the local shop here in Ottawa is $670 CAD [currently on sale for $639]. I'll wait until I can actually find one for around $266 USD.

        Also keep in mind that the AMD design is a true quad-core. They didn't just hack two dual-cores together over an FSB. This is a true quad-core (e.g. the L3 is shared between all four cores) over a higher speed internal bus, attached with it's own memory controller, etc....

        Will the average OpenOffice or Firefox user notice the difference betwee

  • The advantages of four cores on a single die (Score:5, Insightful)

    by Eukariote (881204) on Saturday June 02 2007, @04:44AM (#19361901)

    On-chip connectivity can be much broader and lower-latency than off-chip connectivity. The two-dual-core in one package "quad cores" of Intel have to talk via the off-package north bridge. As you can see from the AMD Barcelona/K10/10h snapshot, the cores live together on a single piece of silicon.

    The space between the the cores is a very broad crossbar, allowing fast inter-core synchronization/cache-coherency. The uniform block at the edge of the chip, outside the cores, is the L3 cache shared by all four cores. Each core has its own L1 and L2 cache. This design is nicely symmetric: each core has equivalent resources. It should do very well on heavy-duty symmetric multiprocessing applications.

    • Re: (Score:3, Interesting)

      by suv4x4 (956391)
      On-chip connectivity can be much broader and lower-latency than off-chip connectivity. The two-dual-core in one package "quad cores" of Intel have to talk via the off-package north bridge. As you can see from the AMD Barcelona/K10/10h snapshot, the cores live together on a single piece of silicon.

      According to Intel engineers though, communication between the chips was never a bottleneck, so the avantages of one vs the other design are questionable. I'm not a processor engineer, but that holds true everywher

      • Re:The advantages of four cores on a single die (Score:5, Insightful)

        by Eukariote (881204) on Saturday June 02 2007, @05:19AM (#19361997)

        According to Intel engineers though, communication between the chips was never a bottleneck
        What a load of crap. For quite a few applications, it definitely is a bottleneck. If you have single-threaded tasks that sit happily on their own processor and do not intercommunicate, then, yeah, it does not matter much what connectivity the cores and dies have. But in the real world, multi-threading and SMP tasks do need to intercommunicate, often heavily so. Also, processes will often migrate from one core to the next because the core it was running on before is in use. At that moment, fast inter-core synchronization of the caches is very helpful.
      • They lie. I write multi-threaded code. My threads pass a lot of data back and forth. I try to keep it to a minimum but minimum is still a lot. Not only that but when threads do pass data between code it is often a critical path for the program. One thread is waiting on the other so it will effect the performance of the system.
        Here is logic 101.
        Your latest product has a weakness.
        do you.
        1. Admit the weakness and loose sales?
        or
        2. Downplay that weakness and say it is never a problem.

        Intel might be right. The i

    • Re:The advantages of four cores on a single die (Score:4, Interesting)

      by slashthedot (991354) on Saturday June 02 2007, @05:55AM (#19362069) Homepage
      The single die - four cores processor architecture from AMD could be a result of their collaboration with Sun which already has 8 cores in a single die general purpose processor UltraSparc T1 for more than a year. It's surprising though that the two chip makers, Intel and AMD, still lag behind Sun in terms of cores per die.
      • The number of cores per die is limited by two things:
        1. Number of transistors per die.
        2. Number of transistors per core.
        Sun can put more cores on a die by having fewer transistors per core, it's as simple as that. Sun is bucking industry trends quite heavily at the moment (see here [informit.com]) by reducing the amount of die space take up by cache. Intel are right at the opposite extreme, with well over 50% of the Itanium die taken up with cache. Modern x86 chips are sitting at around the 50% mark. Intel could easily make a quad core chip with no cache for the same price as their dual-core chips, but performance would be much worse. They could make a single core chip with 50% more cache for the same price, but, again, performance would be worse.

        Exactly what the best trade-off is depends on your workload. Sun are aiming at the web-app server market. It's a good business decision, since this is a rapidly growing area. It's also one of the easiest workloads to run, since it's inherently massively parallel; each web-app typically has a few tens to a few thousand users per server. If one thread in a T1 has a cache miss, then there are a huge number of others that are able to take advantage of the processing resources. Intel and AMD have to support a lot of legacy single-threaded code. A cache miss in one of these is expensive. Main memory accesses are of the order of 100-200 cycles, and so a cache miss every 100 cycles would cause a 50% performance reduction. For the T1, with its 8 contexts per core, it would cause a negligible performance reduction overall, as long as the other threads still have work to do.

        • I also get the impression that Sun's dies are a lot larger too. Big-iron chips tend to be that way. That's part of why those systems are very expensive. So that's another reason why one shouldn't compare the technology between the consumer to small iron market and the big iron market, they are different markets.

      • Re: (Score:3, Informative)

        by Wdomburg (141264)
        Sun put eight in-order single-issue integer only cores on a single die. AMD is putting eight full superscalar cores with branch prediction, virtualization extensions, vector units, blah, blah, etc, etc. Very different design philosophies producing chips with very different aims.

        Sun's foray into more traditional processor designs - the Rock - isn't expected to ship until 2008 and will feature only four cores.

        The only designs actually on the market with eight traditional cores would be the IBM POWER4 and PO
    • In an ideal world, yes. In this non-ideal world, AMD still has to surmount the fact that they are still a fab generation behind. If AMD can't get a clock that is close 3GHz rather than the 2.5GHz I seem to recall AMD reps throwing around, I don't think the same-die advantage will be enough help. Right now, there is no "true" four core x86 on a single die, and there are still a lot of uses for Intel's Core Quad chips, without an AMD competitor in this sector, the advantage still goes to Intel vs a product
      • AMD has been a fab generation behind for years, and still spanked Intel prior to the Core 2 release. And there's far more factors than just clock speed, number of cores and number of dies. Intel's replacement for their aging frontside bus is years behind; the first chip they announced would use it (Whitefield) was canceled back in 2005, and now they're promising it will debut in the later half of 2008. An integrated memory controller, which AMD has had since 2001, will debut at the same time. Using a de
      • Currently both Amd and Intil produce using 65nm, so how can AMD be behind now?

  • and socket type? (Score:4, Insightful)

    by Danathar (267989) on Saturday June 02 2007, @05:12AM (#19361973) Journal
    And it will probably require ANOTHER slot type and force me to upgrade my motherboard yet AGAIN!

    Geeze...please let me keep my motherboard for 6 months!

    • Re: (Score:2, Insightful)

      by Anonymous Coward
      No it doesn't require a new socket. The socket is still AM2, so you can keep your mainboard. The boards, that do come out now are AM2+ boards, they offer a new power saving tech for the Phenom's, which will save you about 10% power consumption.

      • Re:and socket type? (Score:5, Interesting)

        by Eukariote (881204) on Saturday June 02 2007, @05:51AM (#19362059)

        Indeed so. Anyone having bought or buying an AM2/AM+2 desktop motherboard can drop in Phenom processors. When you have a performance AMD 4x4 (1,207-pin Socket F) board with FX processors, you can drop in the new quad core FX chips as well. Similarly, when you have a DDR2 Opteron server/big-iron, you can also upgrade.

        That makes the current AMD platforms attractive: you can buy a cheap Athlon X2 chip to get good performance now, and later upgrade to a Phenom chip and get excellent performance and four-way multiprocessing. I plan to wait with my upgrade until the price comes down a bit.

    • Re:and socket type? (Score:5, Informative)

      by Josef Meixner (1020161) on Saturday June 02 2007, @05:42AM (#19362039) Homepage

      In every press release [amd.com] AMD stated it will run in AM2 sockets. If I remember correctly it will not be able to use the new hypertransport links, support for the new power saving functions (it can switch off complete cores if they aren't needed) in AM2 sockets, it will need AM2+ for that. Sorry, I am far too lazy to search for a reference for those last bits of information, it is something I read in a magazine (paper version).

  • WTF? (Score:5, Funny)

    by GreatBunzinni (642500) on Saturday June 02 2007, @05:39AM (#19362029)
    Photos of processor dies? WTF is this? Some kind of porn for uber-geeks?

  • Danger! Danger! (Score:4, Funny)

    by eebra82 (907996) on Saturday June 02 2007, @07:11AM (#19362325) Homepage
    Now that AMD released high-res pictures of this core, Epson can use their transistor printers we have read about and start selling this CPU ahead of AMD. Good job, AMD!

  • Nooo... Not a new hype word!!! (Score:3, Funny)

    by LWATCDR (28044) on Saturday June 02 2007, @09:16AM (#19362901) Homepage Journal
    Okay I really like my AMD system but they need to be slapped hard for inventing a new goofy marketing term.
    MEGATASKING.
    Dude if you have over a 1024 tasks running at once you need to run some malware clean up software.

    • Okay I really like my AMD system but they need to be slapped hard for inventing a new goofy marketing term.
      MEGATASKING.
      Dude if you have over a 1024 tasks running at once you need to run some malware clean up software.


      My friend, you fail to appreciate the lunacy of the intricacies of marketing. That which you have described would, in fact, be merely kilotasking.
    • Dude, that was my webserver being hit by Slashdot.
  • put the photo in L1 cache to send a not-so-subtle message to your cpu
  • Why don't they just release the CPU? I mean they have it working, they tested it and stuff.
    I'm not trolling, I'm just curious to find out what changes a processor goes through in it's last months before being launched.

    • Re:a mobile version? (Score:5, Informative)

      by Eukariote (881204) on Saturday June 02 2007, @06:04AM (#19362097)

      For mobile, AMD has gone a different route for now, they have reworked the K8 for extremely low power: http://www.theinquirer.net/default.aspx?article=39 894 [theinquirer.net]. The two cores and memory controller get independent voltage planes. And the cores can clock up and down independently. It makes good sense: for mobile, low power is crucial.

      Many of the high-end features (double FPU units, hypertransport interconnects, and so on) of the Barcelona design are not required for a laptop, and add power draw caused by static leakage, even when not in use. In due time, though, AMD will no doubt rework the K10/Barcelona core into a mobile design. Probably they will release a moderately power mobile Barcelona version before that, for high-end workstation type laptops.

    • It's about effing time... maybe chip manufacturers have finally clued in that cache is the single biggest characteristic of a processor that affects (NOT impacts) performance.

      Tell me about it. Those jackass chip hackers at Intel and AMD have been ignoring my advice for years in favor of their own cost/benefit analysis and engineering tradeoffs. If only they'd listen to us expects on Slashdot, there's no telling what they could accomplish!

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